Clock duty cycle

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Hi all,

 

I am looking to make something fun with the MC6847, an old video display processor from Motorola.  I browsed through its datasheet (http://people.ece.cornell.edu/la...) and saw that the requirement on its clock duty cycle to be between 45 to 55%.  I think understand what that means.  But I have been looking at crystals and oscillators' datasheets (the 3.579535Mhz ones) to find if there is such specification.  I am not seeing any.

 

I could have an ATTINY85, for example, running at 3.579535Mhz, to pulse a 50% duty cycle via PWM as a clock source to the MC6847.  Would that work?  I also have seen on the net that a simple 3.578535Mhz crystal (not oscillator) is used with an HCT04 logic IC to provide a clock input for the MC6847.  I much rather use an ATTINY85 or the Atmel uC that I am going to use with CKOUT of the desired Mhz, for example, as a clock provider.

 

I guess typically a square wave for a clock is at 50% duty anyway.

 

Thanks for any tip / suggestion.

Last Edited: Wed. Dec 24, 2014 - 05:59 PM
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Sounds like a fun project.

 

I think that some of the older computer related chips used to have a similar specification, (clock duty cycle), as at least on some golden oldie designs it was not unusual to have a higher freq clock for the motherboard which then fed a number of ripple counters.  This gave one a series of "clock pulses", (albeit at a slower clock frequency), which then fed some of the peripheral chips, boards, and memory devices.  It wasn't unusual to have to have separate signals, for example to latch an address bus, read the data, latch the data, etc.  This would be done with a series of short, sequential pulses.  This stream of short pulses was the "clock".

 

This is vastly different from the "clock" one is accustomed to these days, with a single phase square wave.  The above 45-55 % duty cycle meant that one had to use a higher frequency clock and feed it through a flip flop, if one was using a brief clock pulse as the clock.

 

Additionally, note that that is a pretty wide duty cycle, and gave one latitude in using a simple oscillator, such as the single gate oscillator mentioned above, IF one selected the correct gate and logic type for the oscillator, (and following buffer gate).

 

Will the AT85 work?  I don't have the data sheet at hand.  Can one drive the PWM at a higher freq than the Xtal?  If the PWM's maximum freq was the Xtal freq, then the PWM'd signal would be Clock Freq / 2 at most.  Conceptually using a PWM module as the clock to another chip is fine.

 

If you were to use an XmegaE5 uC then note that it has a configurable logic module, and one could easily generate the color burst clock from a configurable logic module clock feeding a FF giving an "exact" 50% duty cycle.  IIRC the configurable logic module has a couple of "extra" clock/timers, so one isn't even tying up one of the uC's main clock/timer modules to do this, but I haven't looked at the divisor capability to see if the color burst frequency is available without using an external Xtal on the uC.  (What tolerance does the video chip, or more importantly the video "standard" require?).  One could easily, however, put the color burst Xtal on the uC and then use the Xmega's PLL to run the Xmega's clock at a higher multiple of it, so that the exact frequency ould be available after dividing it back down.  (You could run the uC with a PLL of 8 for a uC clock of 28.6... MHz, divisible by 8 to get back the desired 3.579... freq.

 

JC

 

Last Edited: Mon. Dec 22, 2014 - 08:15 PM
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"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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unebonnevie wrote:

I am looking to make something fun with the MC6748, an old video display processor from Motorola.  I browsed through its datasheet (http://people.ece.cornell.edu/land/courses/ece4760/ideas/mc6847.pdf) and saw that the requirement on its clock duty cycle to be between 45 to 55%.  I think understand what that means. ..

 

I guess typically a square wave for a clock is at 50% duty anyway.

 

Correct, a normal CMOS linear gate and buffer self-bias, to give close to 50% duty cycle. Some will specify a duty cycle.

for CKOUT, the CPU needs to run at CKOUT (3.57MHz), or you could use PWM and select a 2N divider, to get 50%, so x4 and perhaps x6 are possible, with faster core speed.

 

Last Edited: Mon. Dec 22, 2014 - 11:31 PM
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The AVR. Could probably mimic the operation of the 6847. Atomic Zombie has done a bit of video stuff with the AVR.

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6800 microprocessor and its serial and parralel interface chips used to work on a biphase clock.

 

One clock phase was used to validate address decoding.

 

It may be the reason for specifyng the duty cycle

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The 6800/6809 used the two-phase clock (E, and Q which lead E by 90 degrees), but none of the peripherals I've seen required Q.  Case in point would be the Coco technical reference manual I linked above.  MC6748, MC6883, MC6821, DRAM, and various support chips.  None use Q.  The 6883 generates E and Q from a 14.31818 MHz crystal (4 times the colour burst frequency since Q leads E by one quarter period).

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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man, we sure have a case of dyslexia! Mc6847 not 6748!

I see nothing unusual with the duty cycle tolerance - most devices have such a spec. As such, the 6847 didn't connect to the bus directly so had very little to do with the cpu clock. The 6883 did all that magic.

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We sure do!

 

First the OP, then me...

 

I once typed Johan's name as Jonah!

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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I once typed Johan's name as Jonah!

That was a whale of a typo.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Kartman wrote:
the 6847 didn't connect to the bus directly so had very little to do with the cpu clock. The 6883 did all that magic.
The design I'm most familiar with is the Coco, which had the 6847 connected to the 6809's data bus via a buffer and a flip-flop, with its CLK input driven by the 6883, which derived all of the clocks from the same crystal.  In the Coco the VDG clock period was a multiple of the crystal frequency.  Fosc / 4 = 14.31818 / 4 = the 3.579545 MHz colour burst frequency.  E and Q were selectable between F_osc / 16 and F_osc / 8, or 0.895 MHz / 1.79 MHz.

 

theusch wrote:
That was a whale of a typo.
GAH!

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

Last Edited: Tue. Dec 23, 2014 - 11:22 PM
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Joey, my comment was in response to ignoramus' comment regarding address decode.
As an aside, i did have to refer to my old databook for the 6847 recently when i wrote some code to emulate it's operation on a stm32 disco board. My code was an emulator for an old computer called a vz300 which was a z80 based computer which used a 6847 as its video. Nothing to do with timing, but rather how it mapped memory to pixels/colors.