The clock (20MHz) is divided by 6 by default. I would like to disable the divider so that CLK_PER will also be 20MHz.
As far as I could understand from the datasheet the following two lines should do the trick:
CCP = CCP_IOREG_gc; CLKCTRL.MCLKCTRLB &= ~CLKCTRL_PEN_bm;
However this does nothing. What have I missed?