C like tool for CYCLONE III

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Hi there,

I just bought my first ALTERA CYCLONE III development kit. I red that there are C like interpreters for FPGAs.

Is there any free tool that I could download for testing ?

Thank you.

Michael.

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C is usually implemented as a compiler. There are CPUs that can be implemented on Cyclone FPGAs, such as the NIOS II, that can be programmed in C; you will find details on the Altera web site.

Leon Heller G1HSM

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To tell you the truth, since I am a little bit confused at this time.....is NIOS II C2H compiler suitable for CYCLONE III FPGAs?

My starter kit has the ALTERA CYCLONE III EP3C16Q240C8N part on board.

Michael.

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Don't you think this is the wrong sort of forum for such questions?

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Yes, I think that this is a wrong forum to post this thread.....but would you be able to suggest me the right one here in AVRfreaks ?

Michael.

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Try the Altera forum:

http://www.alteraforum.com/

Leon Heller G1HSM

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icarus1 wrote:
To tell you the truth, since I am a little bit confused at this time.....is NIOS II C2H compiler suitable for CYCLONE III FPGAs?

My starter kit has the ALTERA CYCLONE III EP3C16Q240C8N part on board.

The C compiler will run on a NIOS II processor implemented on a Cyclone III.

Leon Heller G1HSM

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Thank you guys for all this help. I am moving to the altera forum.

One last question Leon (because I see some experience). Do you mean that the NIOS II is just a part of hardware code that can be fit inside the CYCLONE III core, in order to transform it to something like a proccessor ?

Michael.

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Quote:

Do you mean that the NIOS II is just a part of hardware code that can be fit inside the CYCLONE III core, in order to transform it to something like a proccessor ?

FPGAs are programmed in VHDL or VeriLog. You can get a chunk of HDL that turns N of the gates into a CPU (you can even get an implementation of AVR!). NIOS is a design of CPU that was specifically designed for use in FPGAs. Once the FPGA has an MCU implemented in its gates you need some way to program it. Just like any CPU it fetches and executes numeric patterns. You create those numeric patterns at the lower level with an assembler or at the higher level with a C compiler. When you are programming at this level you have kind of left the "FPGA design" behind - it's what's been implemented in the FPGA gates that you are programming - you aren't saying things like "I'd like an OR gate over here and a flip-flop over there" like you are in VHDl/Verilog.

Having said that I am surprised your original Google didn't hit this thread on Stack Overflow:

http://stackoverflow.com/questio...

the first answer there has a very useful looking link that leads here:

http://stackoverflow.com/questio...

Those really are methods to ultimately generate the HDL from a C like interface. There's even open source ones on that list like:

http://fpgac.sourceforge.net/

Remember that C execution is sequential but VHDL/Verilog are effectively "parallel" - everything happens at once - except when you tell it not to.

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Thank you very much.

Michael.

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Yes there is C at HDL level: SystemC. But that is ment for SoC designs.

But anyway: HDL is not the same as software. Using C doesn't change that!