Bug confirm for TCD on ATTINY814

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Hello,

I did not find the way to report the bug, try to confirm here.

 

I created a breathing LED lighting program by TCD & RTC together.

I found 2 issues not reasonable.

 

1) Must define the CMPBCLR even if I just used the CMPA;

    In ONE RAMP mode, to set CMPASET & CMPACLR is enough if just using CMPA.

    But, refer to the code below,it will not work without "TCD0.CMPBCLR = tcd_CMPBCLR; " for "ebmRed" mode.

void ledBreathingBegin(EbreathMode bm){
	breathMode = bm;
	
    ledBreathingStop();
	
    if(breathMode==ebmBlue || breathMode == ebmBlueAndRed){
	    cmpbsetInc = false;
	    cmpbset = 0;
		TCD0.CMPBSET = cmpValue[cmpbset];
		TCD0.CMPBCLR = tcd_CMPBCLR;
	}
	
    if(breathMode==ebmRed || breathMode == ebmBlueAndRed){
	    cmpasetInc = false;
	    cmpaset = 0;
		TCD0.CMPBCLR = tcd_CMPBCLR;       //???ebmRed will not work without this sentence,why???
		TCD0.CMPASET = cmpValue[cmpaset];
		TCD0.CMPACLR = tcd_CMPBCLR;
    }

	while ((TCD0.STATUS & TCD_CMDRDY_bm) == 0);
	TCD0.CTRLE |= TCD_SYNC_bm; //sync register values 

	TCD_begin(); 
	RTC_INT_ENABLE; 
}

 

2) Can't stop output to pin even if you disable the TCD.

I have to set the CMPxSET to CMPxCLR to stop output before disable TCD.

 

void ledBreathingStop(void){
	RTC_INT_DISABLE;
	
	TCD0.CMPBSET = tcd_CMPBCLR; //try to switch off led, can't switch off by OUTCLR command
	TCD0.CMPASET = tcd_CMPBCLR;
	while ((TCD0.STATUS & TCD_CMDRDY_bm) == 0);
	TCD0.CTRLE |= TCD_SYNC_bm; //must send CMD through CTRLE register,otherwise TCD don't sync
	
	TCD_stop();
}

I think it is some kind of bug.

 

 

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This is not a silicon bug, it's a lack of documentation.
The TCD core operates asynchronously, and registers exist in both normal and asynchronous areas. This is a normal area directly accessed by the program.
For the commands to the TCD core to take effect, the two must be synchronized and there are several triggers for them.
The trigger to synchronize CMPASET, CMPACLR and CMPBSET is write to CMPBCLR.

Please report the lack of explanation to Microchip. Many voices will accelerate document modification.

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kabasan wrote:
Please report the lack of explanation to Microchip.

+1

 

 

 

From there, you will have to log in - then you can create a support ticket.

 

Many voices will accelerate document modification.

Indeed - although don't hold your breath.

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I don't agree.

 

You only need to set CMPBSET &CMPBCLR if only using CMPB(refer to the same code).

The trigger to sync between domains is CTRLE.

 

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You do not need to agree.

However, try writing to CMPBCLR instead of accessing CTRLE.
Please report to the manufacturer, including the results.

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I seem to have misread your problem a bit.
I reread # 1 properly.

 

1) The CMPBCLR setting determines the TCD cycle and cannot be omitted.

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2)

If your "LED OFF" means pin is tied to Lo, CMPASET = CMPACLR will achieve a 0% duty waveform.
If it means fixing to Hi, setting CMPASET = 0 and CMPACLR = CMPBCLR can achieve a waveform with 100% duty.

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Yes, they said that,but I saw this too: 

When used in One Ramp mode, WOA will only use the setup for Dead Time A (DTA) and On Time A (OTA) to set the
output. WOB will only use Dead-Time B (DTB) and On Time B (OTB) values to set the output.

So, nearly all people will think set CMPASET/CMPACLR for WOA and set CMPBSET/CMPBCLR for WOB,right? 

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kabasan wrote:

2)

If your "LED OFF" means pin is tied to Lo, CMPASET = CMPACLR will achieve a 0% duty waveform.
If it means fixing to Hi, setting CMPASET = 0 and CMPACLR = CMPBCLR can achieve a waveform with 100% duty.

 

The normal logic is:

1) TCD will work if enable it,and it will not work if disabled.

2) TCD should stop output WOA and WOB if TCD disabled.

The actual situation is : 

PORTA.PIN4 & PORTA.PIN5 of ATTINY814 will keep lighting after disabled.

And, the strength of light is not 100%, it is below that, that means WOA/WOB is keeping output.

 

And, no matter what you do to DIRSET/DIRCLR/OUTSET/OUTCLR, it keeps lighting.

 

That is bug.

 

Last Edited: Fri. Apr 17, 2020 - 01:39 AM
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Xiao,  zip up the smallest full project, including all TCD and RTC setup, that demonstrates the problem and I will build it on an ATtiny1616 as they are both -1 series chips.

 

If it is a bug, I should be able to reproduce it and/or give feedback based on the results that I obtain.  My time, your gain.

 

"I may make you feel but I can't make you think" - Jethro Tull - Thick As A Brick

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"It's much more practical to rely on the processing powers of the real debugger, i.e. the one between the keyboard and chair." - JW wek3

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Yes, it is CMPASET and CMPACLR that determine the DTA and OTA.
It is consistent with the content of the figure. So I don't understand what you are confused about.

 

 

I have tried it, but when I disable TCD the output stops.
I just disabled TCD with this one line.
 

    TCD0.CTRLA = 0;

 

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Thank you.

I have solved the problem, though I think it is not the normal way.

This post just for discuss.

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Xiao wrote:

And, no matter what you do to DIRSET/DIRCLR/OUTSET/OUTCLR, it keeps lighting.

 

Ah, in order to regain the function as PORTA, you have to cancel Fault Control.

 

    _PROTECTED_WRITE (TCD0.FAULTCTRL, 0);

 

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You are right, it needs a TOP edge for counter.

But 0xFFF is the default TOP for AVR series, people will think in that way without guides.

 

My application:

TCD ---- CMPA ----- WOA ----- PIN4

TCD ---- CMPB ----- WOB ----- PIN5

 

adjust the light intensity through duty ration(WOA/WOB) controlled by changing CMPxSET.

changing CMPxSET in interrupt handler of RTC.

The output exist after TCD disabled:

    while ((TCD0.STATUS & TCD_ENRDY_bm) == 0);

    TCD0.CTRLA &= ~TCD_ENABLE_bm;

    uint8_t temp = TCD0.FAULTCTRL  &= ((~TCD_CMPBEN_bm) & (~TCD_CMPAEN_bm));

    CPU_CCP = CCP_IOREG_gc;
    TCD0.FAULTCTRL = temp;

 

 

 

 

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Xiao wrote:

But 0xFFF is the default TOP for AVR series, people will think in that way without guides.

 

Such preconceptions are a good example of bugs.
Become a person who reads your guide carefully and become a leader in the same way.