is boot_lock_bits_set(_BV(BLB12)) BLB1 mode 2?

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Hi,

I just nitice a problem for letting my bootloader lock the fuse bit to BLB1 mode2.

on the Bootloader Support Utilities of avr-libc,
it said:

Quote:

For example, to disallow the SPM instruction from writing to the Boot Loader memory section of flash, you would use this macro as such:

boot_lock_bits_set (_BV (BLB12));


then I tried this in my bootloader, after I download the code, I checked the lockbits setting in AVRStudio (my version is 4.12 SP2), but it shows it's in BLB1 mode 4, so then I tried:

boot_lock_bits_set(_BV(BLB11));

then in AVRStudio, it shows BLB1 mode 2.

is this a small error or somthing is wrong in my code?

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You don't say which AVR you're working with. I'm looking at table 86 on page 222 of the ATmega8 datasheet as the basis of this analysis, and I'm proceeding under the assumption that it's the same for whichever models you're using. Check your model's datasheet to confirm this.

I assume you want to achieve BLB1 mode 2, but you want to leave BLB0 in mode 1.

That desired mode expands to the following lock-bit byte:
0bXX 10 11 XX

The docuentation seems to suggest that the mask you provide to the boot_lock_bits_set() function will be inverted before the lock byte is actually flashed.

The source code seems to confirm this:

#define __boot_lock_bits_set(lock_bits)                    \
({                                                         \
    uint8_t value = (uint8_t)(~(lock_bits));               \
    __asm__ __volatile__                                   \
    (                                                      \
        "ldi r30, 1\n\t"                                   \
        "ldi r31, 0\n\t"                                   \
        "mov r0, %2\n\t"                                   \
        "sts %0, %1\n\t"                                   \
        "spm\n\t"                                          \
        :                                                  \
        : "i" (_SFR_MEM_ADDR(__SPM_REG)),                  \
          "r" ((uint8_t)__BOOT_LOCK_BITS_SET),             \
          "r" (value)                                      \
        : "r0", "r30", "r31"                               \
    );                                                     \
})

So, BLB1 mode 2 should be achieved by "setting" BLB11 and leaving all other bits "clear". That suggests an error in the avr-libc documentation.

In any event, the final word for guiding you as you choose a bitmask to apply to any of the AVR's peripheral features (lock bits included) should be the datasheet.

- Luke

PS: It seems to me that this should be a one-time deal: You should only need to enter BLB1 mode 2 once in the lifetime of a completed product. It should only need to be repeated in the unlikely event that you need to re-ISP/HVPP/HVSP/JTAG it at some point in the future.

I think you'd be better off if you perform this action during initial production programming and omit it from the bootloader code itself, thereby saving the unneeded Flash waste.

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yes, your suggestion is right, I shouldn't put this in the bootloader code.