Bootloaders, NRWW memory, and perihperals...

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I have bootloader issues writing NRWW memory pages.

The datasheet says "when writing to the NRWW section of memory the CPU is halted." OK; my initial interpretation of that would be "great, it just sits there and I don't have to worry." However, WHAT HAPPENS TO PERIPHERALS (and in particular the UART) during the period when the CPU is halted? The code in question does essentially:
uart_send(ACK);
boot_page_write();
and it LOOKS like the serial bootloader never receives the ACK (but receives a NULL, instead.) As if the UART has sent its start bit but never gotten around to sending the rest of the data bits because its clock was stopped. That wasn't what I expected! It would be understandable if the NEXT command were failing because the host overran the UART while the CPU wasn't reading from it, but it doesn't seem to get that far...
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UART should operate asynchronously of a halted CPU.

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Yes; It turns out that the problem I found had already been fixed, and was due to the PREVIOUS command stopping programmatic reception:
boot_page_erase();
download_code()
uart_send(ack)
boot_page_program();
(the boot_page_erase also stops the cpu, so it misses some of the code download.)

Thanks for the confirmation, though...