Bootloader Design Note 32 EEPROM bug?

1 post / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Is there a bug in the logic in the Atmel Design Note 32 (sample bootloader code) and the many variations we have that were derived from that?

Here's what I'm confused about:
The 'A' command passes a byte address to the bootloader.
In the design note, the address is taken from the UART and left shifted to become a byte address. This works fine for subsequent flash data which is sent using the 'C' and 'c' commands. The shifted address is used to store into the on-chip flash buffer before the 'm' command arrives (write buffer to flash).

However, the bug seems to be as follows.

For EEPROM data, the code uses the same left-shifted address from the 'A' command. If the initial 'A' command address is zero, the left shifted zero doesn't hurt and is auto-incremented, byte-wise. But if the 'A' address is other than zero, then the first store in to EEPROM will be at twice the intended address, due to the rotate done at the code for the 'A' command.

The assumption I think, is that the host PC sends in the 'A' command a word address prior to flash data but a byte address prior to EEPROM data.

Am I wrong?