BLDC using atxmega16 or 32

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Umm... after I finish my TCP/IP stack on UC3A I am soon going to revisit my project on bldc motors :)

I ended up successfully spinning my bldc motor using atmega164 up to 76K rpm. This was the limitation due to the max PWM freq and the BEMF ADC sampling I could generate with that chip.

I now I am thinking of redoing the project using atxemga...there the ADC sampling freq is 2MSPS and the PWM can surely go higher as the chip operating freq is 32MHz (max).

I am a little confused however how to utilise the timer counter interface of atxemga in order to drive the 3 phase (3 pairs) of PWM signals to the motor...

Previously with atmega164 I used one timer for PWM and changed the 6 ouput pins to suit my offsetted outputs and also had an AND gate there to only switch the top 3 sides using the PWM.

I see that atxemga has 3 timers that I could use to drive the 3 pairs of outputs without using the external AND gate...am I correct? How will I then create the offset of 60 degrees between the firing of each phases using the 3 timer counters? Arnt they all from the same input clocks?

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Quote:

up to 76K rpm.

I'll bite - apart from a ducted fan in what circumstance would you ever want to run a BLDC at even 76K rpm let alone faster? I know DF's run at over 100K but that's pretty unusual! Normally it's all about torque which I guess you could get by gearing down a fast spinning motor but then you get gearbox losses.

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There are motors out there (LRK) that have electromagnetic gearing; the commutation runs X times faster then the mechanical part.

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AVR1607 is XMEGA-specific for BLDC.

"Dare to be naïve." - Buckminster Fuller

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lol i like the noise it makes at such high speed rotation! so I would love to see even higher than 100K rpm :D

I was reading the datasheet for atxemga chips... it seems you can do pattern generation using 3 of the channels in a timer 0. So I am going to do that....and use another timer to generate the patterns...I am going to order these chips soon. They seem to be basically beefed up version of mega chips. love the peripheral facilities in them! So flexible.

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Did you get your BLDC design with the AVR32 to work ?

1) Studio 4.18 build 716 (SP3)
2) WinAvr 20100110
3) PN, all on Doze XP... For Now
A) Avr Dragon ver. 1
B) Avr MKII ISP, 2009 model
C) MKII JTAGICE ver. 1

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you mean my bldc design on atmega164 and controlling it via SPI using another UC3A chip...yes it worked pretty well at the end after I slowed the SPI down a bit as the atmega164 has trouble responding back (or making registers available) to the UC3A via SPI.

But I am moving towards atxemga16/32 now seeing how much they are capable :D

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Then it may be possible to just use a 1 chip xmega instead of 2 MCUs or just replace the mega ?

1) Studio 4.18 build 716 (SP3)
2) WinAvr 20100110
3) PN, all on Doze XP... For Now
A) Avr Dragon ver. 1
B) Avr MKII ISP, 2009 model
C) MKII JTAGICE ver. 1

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Well I needed 4 atxmegas cotrolling 4 bldcs and a master chip (UC3A) controlling all those 4 controllers, gyro etc...