BitCloud on AT91SAM7X512 PLL setup problem

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Hi All,

I would like to run BitCloud libraries from Atmel (which was compiled for sam7x256 chip) on the sam7x512 platform from Dresden-Elektronik:
http://www.dresden-elektronik.de/funktechnik/products/radio-modules/eval-derfarm7/?L=1

it contains a chip with biger flash and ram memories.
Currently I have problem with setup PLL for this platform.
In the original halLowLevelInit.c file I modified halLowLevelInit function to support 512 device:

// Startup time of main oscillator (in number of slow clock ticks).
#define BOARD_OSCOUNT           (AT91C_CKGR_OSCOUNT & (0x40 << 8))

// USB PLL divisor value to obtain a 48MHz clock.
#define BOARD_USBDIV            AT91C_CKGR_USBDIV_1

// PLL frequency range.
#define BOARD_CKGR_PLL          AT91C_CKGR_OUT_0

// PLL startup time (in number of slow clock ticks).
#define BOARD_PLLCOUNT          (16 << 8)

// PLL MUL value.
#define BOARD_MUL               (AT91C_CKGR_MUL & (124 << 16))

// PLL DIV value.
#define BOARD_DIV               (AT91C_CKGR_DIV & 24)


/***************************************************************************//*
 \brief This function performs very low level HW initialization
        this function can be use a Stack, depending the compilation
        optimization mode
******************************************************************************/
void halLowLevelInit(void)
{
  uint8_t i = 0;

  /* EFC Init. Maximum Operating Frequency 48000000(Hz) > 30 MHz. Read operation is 2 cycle.
     Master clock is 48000000 Hz. It's approximately 50 cycle for 1 us or about 75 cycle in 1.5 us */

  /* Set flash wait states in the EFC
   **********************************/
  /* 48MHz = 1 wait state */
  AT91C_BASE_EFC0->EFC_FMR = AT91C_MC_FWS_1FWS;
  AT91C_BASE_EFC1->EFC_FMR = AT91C_MC_FWS_1FWS;

  /* enable clock on port A */
  AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_PIOA);


  /* Initialize main oscillator
   ****************************/

  /* Set MCK at 47 923 200 Hz. Crystal 18,432 MHz. */
  /* 1 Enabling the Main Oscillator: */
  /* Typically startup time 1.4 ms for 16 MHz crystal.
     Slow clock = 1/32768 = 30.51 us approximately.
     Start up time = 8 * 6 / SCK = 56 * 30.51 = 1,46484375 ms */
  AT91C_BASE_PMC->PMC_MOR = BOARD_OSCOUNT | AT91C_CKGR_MOSCEN;
  // Wait the startup time
  while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));

  /* 2 Checking the Main Oscillator Frequency (Optional) */
  /* 3 Setting PLL and divider: */
  AT91C_BASE_PMC->PMC_PLLR = BOARD_CKGR_PLL | BOARD_PLLCOUNT
                             | BOARD_MUL | BOARD_DIV;

  AT91C_BASE_PMC->PMC_PLLR |= BOARD_USBDIV;

  // Wait the startup time
  while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK));

  /* 4. Selection of Master Clock and Processor Clock */
  /* select the PLL clock divided by 2 */
  AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 ;
  while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY)); // <-- STOPS ON THI LINE !!! -->

  AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK ;
  while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));


  /* Reset AIC: assign default handler for each interrupt source */
  AT91C_BASE_AIC->AIC_SVR[0] = (int)default_fiq_handler ;
  for (i = 1; i < 31; i++) {
    AT91C_BASE_AIC->AIC_SVR[i] = (int)default_irq_handler ;
  }
  AT91C_BASE_AIC->AIC_SPU = (int)default_spurious_handler;
  // Perform 8 IT acknowledge (write any value in EOICR)
  for (i = 0; i < 8 ; i++) {
    AT91C_BASE_AIC->AIC_EOICR = 0;
  }

#if !defined(HAL_USE_WDT)
  /* Watchdog Disable */
  AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
#endif

#ifdef HAL_ENABLE_AIC_DEBUG_MODE
  // Enable the Debug mode
  AT91C_BASE_AIC->AIC_DCR = AT91C_AIC_DCR_PROT;
#endif

  /* Enable hardware reset on RST pin. */
  /* The external reset is asserted during a time of 2^(RESET_ERSTL+1) slow clock cycles. */
  AT91C_BASE_RSTC->RSTC_RMR = AT91C_RSTC_URSTEN | (RESET_ERSTL << 8) | (RESET_KEY << 24);
}

but it always hangs on the first occurence of the:

  while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));

Any ideas what I did wrong ?

Last Edited: Fri. Oct 16, 2015 - 02:16 PM
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Now this is working perfectly.
I think problem happens when I tried to run with JTAG (but I am not exactly sure this)

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Hello prze_kie

We at the project also have this module from Dresden-Elektronik.
Could You tell us what files need to be changed in order to have the BitCloud running?
Kind regards
Pawel

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Hello I forgot it:
There is BitCloud Profile Suite SDK for SAM3S.
How can I port it to sam7x512?
Kind regards
Pawel

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You can't port SAM3S code to SAM7X part without have the full source code. But there should be a release for SAM7 as well.

NOTE: I no longer actively read this forum. Please ask your question on www.eevblog.com/forum if you want my answer.

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@alexru I can't find any BitCloud Profile Suite for SAM7 on Atmel's site. In the Profile Suite for SAM3EK there are mixed some source files for SAM7 in HAL, but there is no built ZCL library for SAM7.

Is that maybe an Atmel's mistake?

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Actually, it looks like it is supposed to be this way. SAM7 support in SAM3 SDK is to have SAM7 run as a host MCU for SAM3 network processor. But there is no standalone SAM7 PS SDK.

NOTE: I no longer actively read this forum. Please ask your question on www.eevblog.com/forum if you want my answer.

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I would like to implement trust center from HA ZigbeeProfile. As far as I understood I can flash Runner application into deRFUSB dongle with sam3 on board and then using ZAppSiHostLib implement such trust center (or any other cluster) for instance on x86 PC?

//edit: Now I'm trying to run DemoHA on PC, but I can't get it working. I flashed Runner on deRFUSB but it sends me fragmented frames:
1. 0x2a (SOF byte) - parsing result "No frame found"

2. 0x03 0x00 0x11 0x00 0x00 - parsing result "No frame found"

I set baudrate on PC to 38400.

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No, Runner is what runs the stack, it should run on the SAM3 part.

I personally do not recommend using Runner anyway and I do not even want to look at what problems it might have. If you want to keep using it avr@atmel.com is a way to go.

NOTE: I no longer actively read this forum. Please ask your question on www.eevblog.com/forum if you want my answer.

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Yes, Runner is burned on deRFUSB with SAM3 on board, maybe my explanation was wrong a little bit.

So implementing some kind of Runner application from scratch would be a better way?

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I'd say implementing final application and providing minimal number of commands to control it is the best way.

But if your application is a generic TC, then it is going to be hard no matter what. But in your application you will at least have a reliable interface that does not stall everything if one byte gets lost.

NOTE: I no longer actively read this forum. Please ask your question on www.eevblog.com/forum if you want my answer.

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I'm a newbee in ZigBee topic and reference application would be very helpful, that's why I'm trying to run demo applications to see what's going on in real devices, to get a deeper understanding of ZigBee stack - message flow and so on ;)

What do you think about standalone trustcenter demo? Will it be better as reference application? I'd like to extend it with some UART-based interface for dongle<->PC communication.

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Yes, use HADemo application (TC part of it) as a reference and once you are familiar with what it is, start adding serial interface to it.

NOTE: I no longer actively read this forum. Please ask your question on www.eevblog.com/forum if you want my answer.

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And one more question - ZCL is higher abstraction level API for ZDP access, did I understand it correctly?

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No, they are independent and complimentary.

NOTE: I no longer actively read this forum. Please ask your question on www.eevblog.com/forum if you want my answer.