AVRxxDx Debugging: No data breakpoints possible!

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Using current MicrochipStudio+AtmelICE there are no data breakpoints possible !?!?

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Last Edited: Tue. Nov 16, 2021 - 08:37 AM
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Nope - this architecture implementation doesn't have any :/

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mraardvark wrote:

Nope - this architecture implementation doesn't have any :/

 

Disappointing. I believed the new AVR controllers were better than their predecessors in everything.

Does anyone know the background?

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GermanFranz wrote:
Does anyone know the background?
WAG : lack of bandwidth (UPDI maximum frequency is an order of magnitude less than PDI)

Atmel AVR XMEGA D Manual

[page 263, PDI | Features]

...

 

Unlimited number of user data breakpoints, break on:

 Data location read, write, or both read and write

 Data location content equal or not equal to a value

 Data location content is greater or smaller than a value

 Data location content is within or outside a range

 

...

Features | UPDI | AVR® DB Family

 

"Dare to be naïve." - Buckminster Fuller

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gchapman wrote:

WAG : lack of bandwidth (UPDI maximum frequency is an order of magnitude less than PDI)

Plus I'd expect data break needs at least some HW support. To be fully invisible it would need dual port memory.

 

Usually a few lines of code can give data-break, and I've recently been using a histogram data plot in spare memory, where the byte value is used as an index and a saturated ++ is used to show occurrence.

After SW break and memory view, you get a nice map of the whole range of values that were seen during the live run. 

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Who-me wrote:
... it would need dual port memory.
... and a significant amount of memory to buffer a lesser frequency interface (give-and-take, die area allocation)

Who-me wrote:
... and I've recently been using a histogram data plot in spare memory, 
Data can go out a spare port to be captured by a logic analyzer.

Troubleshooting real-time software issues using a logic analyzer - Embedded.com

 

Zero SLOC for UPDI capture.

https://github.com/microchip-pic-avr-tools/pyedbglib/blob/main/pyedbglib/protocols/avr8protocol.py#L354 [memory_read()]

 


pyedbglib · PyPI

AVR - Calibration & Daq toolchain? | AVR Freaks

 

edit :

View Two Sets of Data in the XY Plot | MPLAB® Data Visualizer User's Guide

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Tue. Nov 16, 2021 - 01:06 AM
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gchapman wrote:

Data can go out a spare port to be captured by a logic analyzer.

 

Who-me wrote:
Usually a few lines of code can give data-break

 

A subroutine that tries to monitor a memory cell in real time, i.e. really wanted to monitor every access, makes every interrupt-controlled program unusable.

 

There is no real alternative to data breakpoints and I am very surprised at this step backwards (the old megas have mastered it) . 

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GermanFranz wrote:
There is no real alternative to data breakpoints and I am very surprised at this step backwards (the old megas have mastered it) . 
Presumably you need a device with JTAG to get the bandwidth?

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gchapman wrote:
WAG : lack of bandwidth (UPDI maximum frequency is an order of magnitude less than PDI)

clawson wrote:
you need a device with JTAG to get the bandwidth?

I think many Cortex-M manage to do data breakpoints via SWD ?

 

SWD is a 2-wire interface, like PDI (although on dedicated pins - not trying to re-purpose the RESET)

 

EDIT

 

re-order quotes

 

 

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Last Edited: Tue. Nov 16, 2021 - 09:48 AM
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clawson wrote:

GermanFranz wrote:
There is no real alternative to data breakpoints and I am very surprised at this step backwards (the old megas have mastered it) . 
Presumably you need a device with JTAG to get the bandwidth?

 

I need real-time data breakpoints in my AVR128DB project.

It doesn't reveal to me what that has to do with bandwidth.

Anyway, it should be possible.

I will have to think of more cumbersome debugging methods

in case I need to monitor SRAM memory for quick changes.

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I don't understand why it needs more bandwidth than a code breakpoint.
You stick address comparators on the data memory, stop execution and enter debug state when there's a match, and notify the debug host.
Yeah, it would get bad if the address is modified often, but so would a code breakpoint.

(or did PDI work by sending info for every instruction (load/store only?), since the XMEGA datasheet seems to conflate on-chip features with host features ("unlimited data breakpoints"?))

 

 

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Nothing about UPDI speed, it is entirely a design decision of the debug system on the chip, like westfw says. 

:: Morten

 

(yes, I work for Microchip, yes, I do this in my spare time, now stop sending PMs)

 

The postings on this site are my own and do not represent Microchip’s positions, strategies, or opinions.

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GermanFranz wrote:
A subroutine that tries to monitor a memory cell in real time, i.e. really wanted to monitor every access, makes every interrupt-controlled program unusable.
A subroutine external to the AVR as UPDI is in parallel with the CPU though

  • not via EDBG
  • not CLK_CPU synchronous

 

https://github.com/microchip-pic-avr-tools/pyedbglib/blob/main/pyedbglib/protocols/avr8protocol.py#L354

Memory Read | Embedded Debugger-Based Tools Protocols User's Guide

...

Memories can only be accessed when the device is in STOPPED mode.

...

UPDI Instruction Set | AVR® DB Family

 

P.S.

There's interest in XMEGA PDI; one could do likewise for UPDI.

Protocol decoder:avr_pdi - sigrok

AVR - Calibration & Daq toolchain? | AVR Freaks

 

"Dare to be naïve." - Buckminster Fuller

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or PDI

 

ATxmega128A1U, ATxmega64A1U Data Sheet

[page 208]

38.2.11 PDI characteristics

Figure 38-164. Maximum PDI frequency vs. VCC.

 

Atmel-ICE Features | Atmel-ICE

...

  • Supports JTAG clock frequencies from 32 kHz to 7.5 MHz

  • Supports PDI clock frequencies from 32 kHz to 7.5 MHz

...

  • Supports UPDI baud rates from up to 750 kbit/s

...

 

"Dare to be naïve." - Buckminster Fuller

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gchapman wrote:
WAG

I didn't know what that meant: https://www.avrfreaks.net/commen...

Explanation: https://www.avrfreaks.net/commen...

Top Tips:

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  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
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awneil wrote:
I didn't know what that meant:
I guess it's probably a British thing - I read "WAG" the same way you did !

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clawson wrote:

I guess it's probably a British thing

On this side of the pond it means Wild Ass Guess! I would assume you would say Wild Arse Guess! 

 

FF = PI > S.E.T

 

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I think we just say, "Wild Guess" ?

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I would never say something like #17

 

David.

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awneil wrote:

gchapman wrote:
WAG

I didn't know what that meant: 

 

Here are WAG's and SWAG's in many more words...

https://gettingpredictable.com/h...

 

Surely, anyone on here would be making a SWAG ?  ;)

 

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Funny thing in England is that there's a very strong North/South divide in how "ass" and other words like "grass" are pronounced. As someone from the North, taught to speak by Northern parents but who spent most school years surrounded by bullying (softy) Southerners trying to teach us how to "speak properly" I'm only too well aware of the divide.

 

The difference is that in the south they seem to think there's an 'R' in it so pronounce like "arse" and "gr-arse" etc. 

 

(this probably stems from the fact they have their heads firmly inserted in their collective arses!) 

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The Americans seem to have something of a preoccupation with "ass":

  • Wild-Ass Guess
  • bad-ass
  • kick-ass
  • dumb-ass
  • etc?

 

surprise

Top Tips:

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  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...