AVR32 NAND GPIO Driver Interfacing capability [size]

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Dear all,

 

I'm new to parallel Nand Flash interfacing to AVR32. Kindly bare with my Noobness :)

 

I'm trying to interface a 64GB (Giga Byte) Nand IC using EBI/SMC Nand pins of AT32UC3A3128S MCU. I was told by a Microchip support executive that the address space per chip select in EBI/SMC allows only interfacing upto 165 MB. So it is not possible to interface a 64/128 GB NAND Flash using this interface. Is there any way to bypass this limitation and interface Nand without any size limitation ?

 

Alternatively without using MCU NAND pins  (App note 32136), I'm planning to use GPIO to bitbang Nand signals & ECC to interface a 64GB IC. If I choose this software way to interface NAND IC, there will not be any size limitation right (as in the above hardware way) ?
 

And if this approach is not effective, cant I use MMC 4.3 on MCU to interface a eMMC Nand flash (considering MMC & eMMC are same and eMMC latest standards support backward compatibilty)

 

Kindly pls confirm these.

 

Thanks in advance.

 

Last Edited: Wed. Aug 14, 2019 - 06:59 AM
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The way you can interface any kind of memory on any kind of micro when you run out of address pins is simply to use GPIO lines to create the upper address bits - in effect "bank switching".

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@clawson

 

Thanks for your reply. I will be grateful... if you could put any MCU related links/App notes of bank switching to further deepen my understanding about this.

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I don't think that technique would work on NAND flash - the interface is a little smarter than the old parallel memories.

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Missed that it was Nand - usually that has a serial interface (I2C/SPI) and "in band" addressing (you send it commands with address bytes then read/write the data) so does that stuff really go on the EBI anyway?

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Nor and Nand flash - so easy to confuse! The original flash was nor and had address and data pins like the old roms and eeproms. Then it eventually came out in small pin count with serial interfaces. Nor is also the type of flash in single chip micros like the AVR.

Nand came along and offered much better storage density at the cost of reliability. These usually had a 8/16 bit bus interface and appeared like a block storage device. To access these you would have a nand controller that made the interface faster and could do things like ecc generation/checking which is required for nand. The nand controller feature is an option on the EBI interface. In this instance it seems the nand controller in question can’t cope with the addressing requirements of the newer density flash devices.
The likes of your usb sticks and sdcards use nand and basically consist of nand chips and a controller with has a little micro in them. I think Bunny Huang has hacked certain devices.

Also worth noting is the emergence of serial nand flash chips. You can get 1/2Gb (128/256MB) devices in 8 pin packages with a 1/2/4bit spi like interface. The downside is you need to implement wear leveling so you cant just use the likes of fatFs to store stuff on these. There’s littleFs, but that needs a bit more ram and code so that counts the AVR out in most cases. Ok for the bigger M4 arms though.

Last Edited: Fri. Aug 16, 2019 - 11:38 PM