AVR observer SRAM data bus

Go To Last Post
18 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

 

Hello I made a SRAM 62256 interface with an atmega164p I would like to put a second microcontroller that retrieved all the data send to the SRAM or issued by the latter without the disturbed. The microcontroller 1 (the one that serves as the SRAM interface) receives the data on the data bus when the data bus is output but the microcontroller 2 (the one that just retrieves the data as an observer) sees the data only at the next read cycle if and only if the next operation is a read on the SRAM With SRAM in write mode the microcontroller 2 receives the data

 

I attach a copy of the schema on PROTEUS

Thanks for your help

Attachment(s): 

Tek-Tekel

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Rather that attaching, it's far better if you embed the image in the post - so that we can see it:

I did crop it.

 

 

tekel wrote:
I would like to put a second microcontroller that retrieved all the data send to the SRAM

So you're basically trying to make a dual-port RAM?

 

Perhaps you should read-up on the general techniques for dual-port RAM?

 

But why do you really need to do this?

http://www.catb.org/esr/faqs/sma...

 

Top Tips:

  1. How to properly post source code - see: https://www.avrfreaks.net/comment... - also how to properly include images/pictures
  2. "Garbage" characters on a serial terminal are (almost?) invariably due to wrong baud rate - see: https://learn.sparkfun.com/tutorials/serial-communication
  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

thank you for answering me so quickly.

I can not change RAM because I am conditioned by the system
The interest is to recover all the data transmitted SRAM in a given system
This allows me to see the data stored for other purposes
thank you

Tek-Tekel

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

As long as the "snooper" chip has all the signals set as input and is not trying to "contend" access from the other device I wouldn't have thought that there was any particular issue with it "listening in". But I do kind of wonder why it's necessary to do it like this anyway?  Why not simply have the two AVRs linked by some kind of communication link like UART, SPI, I2C or similar. Then in the chip that's connected to the SRAM you do something like:

SRAM_write(uint16_t addr, uint8_t val) {
    ADDR_PORT = addr >> 8;
    LATCH_HIGH_ADDR;
    ADDR_PORT = addr & 0xFF;
    DATA_PORT = val;
    STROBE_WRITE;
    comms_link(addr, val);
}

int main(void) {
    SRAM_write(0x1234, 0xAA);
}

So that for each write that is made the master not only wiggles the addr/data/control lines to the SRAM but at the end it also lets the other chip know what it just did. That way the second AVR gets to hear about all the activity without needing to monitor 16 address lines, 8 data lines and a bunch of control signals. It only needs 2 wires (UART), 3 wires (I2C) or 4 wires (SPI) in common with the other AVR (with one being common Gnd in each case).

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

clawson wrote:
But I do kind of wonder why it's necessary to do it like this anyway?

Reverse engineering?

Letting the smoke out since 1978

 

 

 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

The '245 is redundant in this schematic.  Although, if digitalDan is right, it may be impractical to remove.  S.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

What do  you want to do with the captured data?

The listening device might be too slow to capture the data. Are you using interrupts there?

 

Have you considered using a Logic Analyser as a listening device?

Doing magic with a USD 7 Logic Analyser: https://www.avrfreaks.net/comment/2421756#comment-2421756

Bunch of old projects with AVR's: http://www.hoevendesign.com

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Paulvdh wrote:

The listening device might be too slow to capture the data. Are you using interrupts there?

 

This is probably true also.  As a rule of thumb, the 'snooper' chip should be ten times (or more) faster than the chips being snooped upon.

 

One way to somewhat improve the speed problem would be to use 3x 8-bit latches (say, 74xx374) on the 'snooper' so it'll grab all the data and addresses at once, then feed them back into the 'snooper' AVR at the AVR's speed.  Of course, if there's another RAM access before the 'snooper' is done with that, it'll be missed or corrupted...  And you'll need a hardware (no, you can't do this through the AVR) OR gate to create a single latch signal on RAM /WR and RAM /RD.

 

Have fun.  S.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thank you for your answers
The microcontroller 1 is to place as a study but instead of a Z80 and together with the SRAM form a known and functional system
So the use of a serial link can not be done
thank you

Tek-Tekel

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

So why not - as already suggested - just use a logic analyser?

 

You can get suitable ones on ebay for ~$10 

Top Tips:

  1. How to properly post source code - see: https://www.avrfreaks.net/comment... - also how to properly include images/pictures
  2. "Garbage" characters on a serial terminal are (almost?) invariably due to wrong baud rate - see: https://learn.sparkfun.com/tutorials/serial-communication
  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

The AVR or any micro-controller is designed to hide all this digital activity between CPU and SRAM.   The circuit basically has an external SRAM chip connected to a pseudo 16-bit Data/Address bus of the type that is normally found on 8-bit micro-processor systems.   The pseudo 16-bit D/A bus needs to have an address/data bus demultiplexer IC because the processor will normally put the low address logic on the data bus and then strobe the ALE (address latch enable) line to "lock" the address.  Then the data bus changes from having the low 8-bits of address to data.   The microprocessor like a Z80 does all this in the background, but the AVR has to do each operation separately to make the right signals to interface with an external SRAM chip.  I'm not even sure that the mega164 has an ALE pin or the capability to interface with external memory. 

 

  In any event, the best way to monitor data/address bus activity on a microprocessor system is to use a logic analyzer.  The new logic analyzers are in a cheap small plastic box that uses USB to connect to the target circuit and the PC's memory to store and display the millions of data samples taken on each "run".  Old logic analyzers had 30+ lines that could connect to the entire 8-bit data, control, and address buses all at the same time.   They were very expensive to buy, very difficult to configure and install into a target system, and had limited (and difficult to decipher) memory buffers for the resultant data.   Like old-fashioned typewriters, they will not be missed.

 

  I don't believe that anyone here has any idea of what you are trying to do with the configuration that you have described.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Simonetta wrote:
The new logic analyzers are in a cheap small plastic box that uses USB to connect to the target (sic?) circuit

You mean USB to connect to the Host, surely?

 

Image result for saleae

 

 

I don't believe that anyone here has any idea of what you are trying to do with the configuration that you have described.

certainly can't disagree with that!!

Top Tips:

  1. How to properly post source code - see: https://www.avrfreaks.net/comment... - also how to properly include images/pictures
  2. "Garbage" characters on a serial terminal are (almost?) invariably due to wrong baud rate - see: https://learn.sparkfun.com/tutorials/serial-communication
  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

Simonetta wrote:

...  The pseudo 16-bit D/A bus needs to have an address/data bus demultiplexer IC ...

...  I'm not even sure that the mega164 has an ALE pin or the capability to interface with external memory. ...

 

Technically, no.  If you're willing to use a lot of pins you can have an SRAM interface even on an AVR that doesn't have one built in*.  I've built systems that did.  Of course, you can't use it as straightforwardly as internal RAM, but here's some assembler:

 

(And no, it doesn't, but you can always use generic I/O for one.)

 

Pseudocode:

out PORTA, r30   ; low byte address to SRAM

out PORTB, r31   ; high byte address to SRAM

out PORTC, r16   ; the data, 24 pins so far...

cbr PORTD, 7         ; drop SRAM /WR

sbr PORTD, 7         ; And Bob's your uncle.  You'll need a /RD pin as well, unless you're using a Signetics Write-only chip.

and no, the <code> window still doesn't work down here.  Still have no idea why.

 

The above presumes the existence of a 16-bit address bus AND an 8-bit data bus (not unlike ISA, from an old PC) on the board, and doesn't need the demux IC.

Have fun, S.

 

* Some v. old AVRs did have hardware SRAM interfaces.  I think they're all long obsolete by now.

Last Edited: Fri. Aug 17, 2018 - 04:15 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

If the z80 is controlling the bus, how do you propose to access the sram? You can make the z80relinquish the bus by asserting its dmareq signal. If you cannot do this,then your task just got a lot harder.

Next time, when you ask a question, give us the whole thing - not some obscure diagram in proteus that has nothing to do with your actual task.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Kartman wrote:

If the z80 is controlling the bus, how do you propose to access the sram? You can make the z80relinquish the bus ...

 

Doesn't have to, if everything ELSE on the bus is reading only.  And synchronized with SRAM writes.  Of course, for this they'd probably want their own SRAM and stuff...  I'm not the OP.  This isn't quite how I'd go about the job, really.

 

As far as applications go, reverse engineering is not a crime (at least, not where I live: YMMV).  Copying code, however, is.  The legal definitions get awfully fuzzy down here.  S.

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

OP said the microcontroller #1 is replacing a Z80 

 

but none of it really make sense.

 

If this is a reverse engineering exercise, then a logic analyser really would seem the best tool ...

Top Tips:

  1. How to properly post source code - see: https://www.avrfreaks.net/comment... - also how to properly include images/pictures
  2. "Garbage" characters on a serial terminal are (almost?) invariably due to wrong baud rate - see: https://learn.sparkfun.com/tutorials/serial-communication
  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hello
Thank you for ideas on this project.
As said above U1 replaces a Z80 in my experience but during the realization, things will return in order.
The purpose of the project is simply to retrieve data and address each respectively on his bus and displayed on a PC.
Not finding a solution, I thought to pass the data in a microcontroller (it will serve as a link between U1 and SRAM) as a bridge or it flows in both directions. This replaces U3.
What do you think?

Thank you

Tek-Tekel

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

tekel wrote:
The purpose of the project is simply to retrieve data and address each respectively on his bus and displayed on a PC.

Then, as suggested many times by many people, a cheap logic analyser is the obvious solution.

 

Not only will it be the quickest & easiest - and, quite possibly, even the cheapest - solution for your stated purpose here, but it will also be a valuable tool for use in the future!

Top Tips:

  1. How to properly post source code - see: https://www.avrfreaks.net/comment... - also how to properly include images/pictures
  2. "Garbage" characters on a serial terminal are (almost?) invariably due to wrong baud rate - see: https://learn.sparkfun.com/tutorials/serial-communication
  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...