I am using ATxmega256A3BU-xplained. I select 32MHz internal oscillator for clock (ClkPER) of the timer and avr core by modifying conf_clock.h as follow.
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_1
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1
In addtion, for using USB, I added below.
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
#define CONFIG_OSC_RC32_CAL 48000000UL
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF
I ran TCC0 as single slope PWM mode and noticed the timer was running based on 48MHz clock. I checked the system clock selection and prescaler registers' values on Studio 6 while debugging. But they showed the values as set in the conf_clock.h file. If I use PLL as system clock source and set PLL output to 32MHz, the timer run based on 32MHz. So this may be a chip design error? By the way, if the timer runs based on 48MHz clock, does it mean that AVR core runs at 48MHz?