ATXMEGA A: is wired AND function available on PWM output

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Hi,

 

For the ATXMEGA A series chips, please can anyone confirm what the situation is regarding setting a wired AND configuration on a pin

designated as single slope PWM output?

 

Also, is it possible to set up an event at BOTTOM for the counter?

 

I ask these questions because of doubts raised when reading the manual:

 

14.8.1 Waveform Generation

 

The compare channels can be used for waveform generation on the corresponding port pins.

To make the waveform visible on the connected port pin, the following requirements must be fulfilled

1. A waveform generation mode must be selected.

2.Event actions must be disabled.

3.The CC channels used must be enabled. This will override the corresponding port pin output register.

4.The direction for the associated port pin must be set to output.Inverted waveform output is achieved by setting the invert output bit for the port pin.

 

Thanks

John

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Hello, John -

 

What do you mean by "wired AND"? Those 4 requirements all have to be met. That means 1 AND 2 AND 3 AND 4. That does not really qualify as a "wired AND" so things are a bit of a puzzle.

 

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

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jalbinson wrote:
setting a wired AND configuration on a pin

Like Jim, I'm not sure what you mean by that?

 

Surely, "wired AND" is a way of connecting things outside the chip - not something you configure within the chip ?

 

Do you mean, "How to set a pin as Open-Drain?" ?

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Hi Jim,

I'm trying to implement a 32 bit compare function using 2 16bit timers. In order to do this I need an AND function to check the output of the two timers set as single slope PWM generators each feeding an inverted output pin. I was hoping that I could set these two pins as wired AND to get the AND function so could wire a third pin to the joined two output pins to report by interrupt that both counters has achieved a count match.

 

John

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jalbinson wrote:
I'm trying to implement a 32 bit compare function using 2 16bit timers.

Wouldn't it be simpler to just use a chip with a 32-bit Timer?

 

jalbinson wrote:
set these two pins as wired AND

Again, wired-AND is the way the things are connected-up outside the chip - so you can't configure that within the chip.

 

So are you just asking how to configure the pins as Open-Drain - which is necessary for wired-AND ?

 

 

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http://ww1.microchip.com/downloads/en/AppNotes/doc8045.pdf

 

contains:

32 bit operation with 32 bit input capture by timer cascading (it's in section 5!)

Is this what you are talking about when you talk of joining timers? Personally I would not call it "AND" as that suggests a boolean operation. It's simply a "cascade".

Last Edited: Thu. Jul 30, 2020 - 03:51 PM
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Do you mean, "How to set a pin as Open-Drain?" ? - yes - is this mode available when the pin is outputting PWM.

I like the Atxmega chips as I only code in assembler.

 

John

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No I can capture but want to compare.

John

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jalbinson wrote:
want to compare.
compare what exactly?

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I am trying to implement a phase adjustment to a SVPWM controlled motor. 2 cascaded timers gives me a clock count between Hall pulses and the phase difference is computed by two cascaded PWM timers signalling output when their 'compare count' reaches the CCx count representing the phase shift. So effectively I want to use 4 - 16 bit counters to do the lions share of the work to implement the motor control phase shift.

 

John

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I would need to see a block diagram of the setup, and a timing diagram, to really understand exactly what you are working on.

 

That said, know that the Xmega32E5 has a programable logic module that might make your project easier.

 

Some of the newer chips also have this, but you mentioned liking the Xmega.

 

JC

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Some mega-0 (and others, I presume) have configurable logic blocks called CCL, I think. Logic is all two input, one output. You define the truth table and there is a flip-flop in each. Advantage of these is that there is no latency, as there might be in an ISR, so it is close to real time with respect to the MCU clock.

 

mega-0 is considered by many as "just another xmega". Newer DA series, which shares the same heritage, may have similar.

 

Jim

 

Until Black Lives Matter, we do not have "All Lives Matter"!

 

 

Last Edited: Thu. Jul 30, 2020 - 11:21 PM
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Thanks everyone for your thoughts.

 

I guess I can encapsulate my query by asking if  pin configurability is still available when waveform generation on that pin is selected..

 

I will wire up a board and check it out.

 

John