Attiny816 TCD event configuration using START?

Go To Last Post
7 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

 

I'm trying to configure a new Attiny816 project using START (should save time, right?).

CLK_TCD0 is already 20e6 Mhz / 8 so 2.5e6 MHz. An event should be generated at 10 KHz rate. So if CLK is 2.5e6, compare value should be 1e-4 / (1/2.5e6) = 250 (fixed to 249 in code).

At this point I'm not sure how to configure "Event control" A or B in order to generate an even upon compare match. If anyone can make sense of these definitions it would be great!

Please event mux settings below the TCD config. page.

 

 

 

 

Last Edited: Sat. Feb 2, 2019 - 09:42 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Well, I never used a timer type D, only A and B. But everything should be explained in the datasheet, right?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

El Tangas wrote:

Well, I never used a timer type D, only A and B. But everything should be explained in the datasheet, right?

 

Yes, however if it would have been that simple everything would work correctly on the 1st go. I have consulted with the datasheet and posted after not being able to get the functionality I need even though I have done things according to what instructed. At least as far as I understand. TCD is a bit different than the others.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

The period of TCD is specified by CMPBCLR. The setting value is 249 if the cycle is 250 cycles.
I do not know how to make Syncronization Prescaler DIV 8 with AtmelSTART. I could not find the setting field.
For operation check, I directly edited tcd.c of the exported project and set up DIV 8.

 

 

In setting up the event system, you have incorrect channel selection.

 

 

 

I confirmed that an ADC interrupt occurs every 2000clk with the following code.

 

#include <atmel_start.h>

#include <avr/interrupt.h>
static volatile uint16_t adc_res;

int main(void){
	atmel_start_init();		// tcd.c Customized DIV8

	ADC0.INTCTRL = ADC_RESRDY_bm;
	ADC0.CTRLC = ADC_REFSEL_VDDREF_gc | ADC_PRESC_DIV16_gc;
	ADC0.CTRLA = ADC_ENABLE_bm;
	ADC0.EVCTRL = ADC_STARTEI_bm;
	sei();
	
	while (1) {
	}
}

ISR(ADC0_RESRDY_vect){
	adc_res = ADC0.RES;		// Break point
}

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

slow_rider wrote:
(should save time, right?)
This thread would appear to suggest otherwise ;-)

 

The thing about "code generators" that all it really does is switch the thing you have to learn from "raw registers" (in the datasheet) to "API"s in the generated code.

 

I guess the big question is which is the lesser of two evils ?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thanks!

I'm still not 100% sure on how TCD works with those 4 compare registers. I've confirmed that an event is generated and the program enters the ADC ISR.

TCD is "special" in the sense it can work Async. The configuration of the clock signal it gets is located in the CLKCTRL settings (right column).

 

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I did not know that the item of Syncronization Prescaler is in such a place.
I also learned a lot. Thank you.