ATTiny461 -- doing ADC while changing voltage reference on the fly?

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I have a design using the ATtiny461. Currently I have ADC conversions running on 4 pins using the internal 1.1v reference. This seems to work fine. I am putting the CPU to sleep using set_sleep_mode( SLEEP_MODE_ADC ), then for each conversion, setting ADMUX and kicking off the conversion using sleep_mode(). The interrupt fires when it is complete, I have an EMPTY_INTERRUPT( ADC_vect ); handler, the CPU wakes up, and I return the value in ADC.

 

For the hardware design we are wondering if we can use the 1.1V reference for 3 of the 4 pins I'm sampling, and our VCC as the reference for the 4th pin. This 4th pin would be a battery voltage monitor.

 

Given that I can't set the voltage reference per channel, but can switch it on the fly, what do I need to worry about here? Has anyone done this? Specifically I'm wondering about:

  • The 4th pin will generally have a higher voltage, like 3.6V, on it all the time, even while the ADC voltage reference is set to 1.1V.

  • The other three pins will have voltages under the 1.1V reference at all times.

 

Is this combination possibly damaging to the chip?

 

I'd plan to switch references on the fly when I want to read the 4th pin -- should I insert fixed delay times to allow the hardware to settle after changing references?

 

The datasheet seems to suggest that the voltage reference is on when the ADC is enabled and with startup time of typically 40 microseconds. It doesn't seem to give much guidance on what to do when changing reference, except to say that "The first ADC conversion result after switching reference voltage source may be inaccurate, and the user is advised to discard this result."

 

Any experiences or thoughts to share?

 

Thanks!

 

Paul R. Potts - paul@thepottshouse.org

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As a general rule, after switching your ref source, you need to wait for it to settle at the new level or throw away the first conversion.

If you have a cap on the AREF pin, I have found the wait time is short when raising the ref level, and a bit long(er) wait time when switching to the lower ref level.

Wait time will vary with the size of cap, if used if any. 

 

Jim

 

 

 

(Possum Lodge oath) Quando omni flunkus, moritati.

"I thought growing old would take longer"

 

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Thanks Jim --

 

I'm not entirely clear how to hook up AREF, AGND, and AVCC for the best accuracy.

 

The datasheet says "Optionally the internal 1.1V/2.56V voltage reference may be decoupled by an external capacitor at the AREF pin to improve noise immunity."

 

But elsewhere the datasheet says "The Internal reference voltage of 2.56V, can optionally be externally decoupled at the AREF (PA3) pin by a capacitor, for better noise performance" implying that this doesn't help with the 1.1V reference.

 

The REFS2..0 bits have separates option to specify whether you are using a bypass cap or not, but only for 2.56V, not 1.1V. So I'm wondering if this really helps with 1.1V.

 

If I was going to do ADC conversions, switching between VCC and internal 1.1V only, what would I do with AREF? Leave it unconnected, connect to ground, or connect to ground with a cap, and if a cap, what size? I'm similarly unsure what I should do with AGND and AVCC.

 

The datasheet doesn't seem to provide any suggestions on these questions.

 

Thanks,

 

Paul

 

Paul R. Potts - paul@thepottshouse.org

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My first query is to tell more about the "battery voltage monitor".  Is the battery voltage used directly as Vcc?  [if not, why not? ;]

 

ki0bk wrote:
If you have a cap on the AREF pin, I have found the wait time is short when raising the ref level, and a bit long(er) wait time when switching to the lower ref level. Wait time will vary with the size of cap, if used if any.

I agree about lower-to-higher.  Always throw away AT LEAST one conversion when changing reference.

 

High-to-low -- a different kettle of fish.  Wait time might work, but IME it might be a long long time in microcontroller terms.  There have been past threads that dug into this.  Just waiting, it is only leakage that will draw it down, right?  Doing a bunch of dummy conversions forces the ADC to take a sip of the reference each time.  IIRC 16 conversions was a magic number.  But it might well vary in different AVR models and generations?

 

ADC sleep mode, eh?  Trying to get that last LSB from your conversions?  How close have you done a calibration on the BG reference, which has a nominal tolerance of about +/- 10% ?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Disclaimer: I've not used the T461.

 

That said, have a look at Atmel Application Note AVR042: AVR Hardware Design Considerations.

 

Generally, one connects the ARef pin to a 0.1 uF cap, the other end of the cap is connected to Ground.

That should be done whenever using the internal references.

 

For "best" results one might make an effort to keep the digital and the analog parts of the circuit separate from each other.

This would help to keep the digital switching noise out of the analog circuitry, where it can impact results.

The Analog Ground, (AGnd), still has to connect to the digital (rest of the circuit) Ground.

For the vast majority of cases this is a single connection point, often made right at the source of the power supply.

Likewise, the Analog Vcc, (AVcc), supplies power to the analog parts of the chip, (ADC, DAC, Analog Comparator, PortA, etc.).

This pin, on some of the micros, also supplies power to a few other pins, I think.  The details regarding this are in the fine print in the data sheets.

Clearly AVcc needs to be connected to power, sometimes this could be a separate power supply, or directly to the main Vcc through an LC filter, or just directly to the Vcc, with a 0.1 uF cap to (analog) ground.

Note that Vcc and AVcc have to be within a few 1/10th's of a volt of each other, details in the data sheet, electrical spec's.  A direct connection and an LC filter connection meet this requirement.

 

Note that for many applications the increased accuracy of the LC filter from Vcc to AVcc might not be needed, just the cap to ground will suffice.

 

You didn't mention your sampling rate, which might impact your approach.

 

Depending upon just how steep your power saving requirements are you might consider feeding Vcc through a resistor divider, with a small cap from the center point to ground.

You might have the resistor divider voltage set at Vcc/3, for example.

You can use very high resistor values for the resistor divider, to limit their current draw.

The cap is there to "feed" the sample and hold cap inside the ADC input circuitry, (and meet the ADC input impedance requirement, even though one is using very high resistor values).

The goal is to set the battery monitoring voltage such that you only need one reference voltage for the entire project, set it and forget it, (i.e. scale the batt monitor voltage into the ADC range you are using for the other ADC signals).

 

JC 

 

Last Edited: Tue. Nov 8, 2016 - 08:30 PM
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>Is the battery voltage used directly as Vcc?  [if not, why not? ;]

 

I'm not the hardware designer -- and not an EE -- but from what I understand, the board has a regulated 5.1V supply, which we will use for VCC. The idea was to also feed the battery voltage to an ADC pin to detect voltage drop. So in my code I've got a two values I'm looking at, to decide (with some hysteresis) whether to turn on a digital output indicating low battery.

 

>ADC sleep mode, eh?  Trying to get that last LSB from your conversions?  How close have you done a calibration on the BG reference, which has a nominal tolerance of about +/- 10% ?

 

My hope was mostly to reduce jitter. It already seemed to help to put a 0.1uF cap on VCC. Apparently on my prototype board I am using AVCC wrong so I will try to fix that next. I don't have a really good sense yet for how accurate the actual voltage readings are. It They seem to only differ from what my voltmeter and some calculations tell me by maybe 5 LSBs which is good enough. I'm also averaging a few readings to try to smooth them a little. Throwing away 16 readings would be doable. I am hoping in the final software to have the micro turn off peripherals, sleep most of the time, and also maybe take the clock speed down. There isn't a lot of computation required in this application, it just has to wake up once every 500 years (in CPU terms), take readings, and update outputs accordingly.

 

 

 

Paul R. Potts - paul@thepottshouse.org

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Thanks -- I will look at the application note.

 

It isn't at all clear (well, at least not clear to me) from the datasheet itself that AVCC should be connected to power. On the breadboards and soldered prototype board that I've built to test the 461, the programming, ADCs, and GPIO all seem to work fine without AVCC and AGND connected at all. In the 461 datasheet, it mentions AVCC only a few times and at no point is it really clear that it needs to be connected to power, except in one diagram showing parallel programming with VCC and AVCC connected to +5V.

 

Searching for "AVCC" it is only found a couple of times in the datasheet itself.

 

"If active channels are used, using AVCC or an external AREF higher than (AVCC - 1V) is not recommended, as

this will affect ADC accuracy." (This same sentence is used again).

 

That is hard to parse, but as I wasn't planning to use AREF, it seemed OK to leave both unconnected.

 

It is mentioned again in a table under "ADC Characteristics" where it shows min and max but no "typ." And VREF is shown with a max of AVCC - 0.5, so I assumed that if VREF was unconnected because unused, AVCC should not differ from VREF...

 

Anyway I am glad to be corrected before we finish turning my prototype design into a real PCB, so thanks!

 

Paul R. Potts - paul@thepottshouse.org

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>You didn't mention your sampling rate, which might impact your approach.

 

Sampling rate is low -- I think 100Hz would actually be plenty.

 

> Depending upon just how steep your power saving requirements are you might consider feeding Vcc through a resistor divider, with a small cap from the center point to ground.

You might have the resistor divider voltage set at Vcc/3, for example.

You can use very high resistor values for the resistor divider, to limit their current draw.

The cap is there to "feed" the sample and hold cap inside the ADC input circuitry, (and meet the ADC input impedance requirement, even though one is using very high resistor values).

The goal is to set the battery monitoring voltage such that you only need one reference voltage for the entire project, set it and forget it, (i.e. scale the batt monitor voltage into the ADC range you are using for the other ADC signals).

 

Yeah, we might use a voltage divider -- I will talk to our EE about using a cap in the voltage divider. That would simplify things if I could use one reference voltage.

 

Thanks,

 

Paul

Paul R. Potts - paul@thepottshouse.org

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paulrpotts wrote:
It isn't at all clear (well, at least not clear to me) from the datasheet itself that AVCC should be connected to power.

See section 1.1.3:

AVCC
Analog supply voltage. This is the supply voltage pin for the Analog-to-digital Converter (ADC),
the analog comparator, the Brown-Out Detector (BOD), the internal voltage reference and Port
A. It should be externally connected to VCC, even if some peripherals such as the ADC are not
used. If the ADC is used AVCC should be connected to VCC through a low-pass filter.

Table 19-7:

Analog Supply Voltage minimum VCC - 0.3

 

Edit: Emphasis added.

 

 

David

Last Edited: Tue. Nov 8, 2016 - 09:12 PM
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Doc's advice to change your battery input to match your 1.1v ref is a good one, if it still has the resolution you need.

I built a battery monitor (12 v sla) using a tiny25 that seems similar to what your doing.  I used a v/divider with 100k/15k 1% resistors, worked well for the range

of values I was reporting on (10 - 15v), I used the 2.56v ref on that one.  Begin using idle sleep mode, once the logic is working, drop to lower power sleep modes

and if you can, change the clkpr(will affect t/c's if used) to lower the cpu speed while in sleep mode.   Take it one step at a time.

 

Jim

 

 

 

(Possum Lodge oath) Quando omni flunkus, moritati.

"I thought growing old would take longer"

 

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paulrpotts wrote:
It isn't at all clear (well, at least not clear to me) from the datasheet itself that AVCC should be connected to power. On the breadboards and soldered prototype board that I've built to test the 461, the programming, ADCs, and GPIO all seem to work fine without AVCC and AGND connected at all. In the 461 datasheet, it mentions AVCC only a few times and at no point is it really clear that it needs to be connected to power, except in one diagram showing parallel programming with VCC and AVCC connected to +5V. Searching for "AVCC" it is only found a couple of times in the datasheet itself.

???  As in [nearly?] all datasheets for AVR models with an AVcc pin, I find:

It should be externally connected to VCC, even if some peripherals such as the ADC are not
used.
 

You'll need to check or decide for yourself about AGnd.  On some AVR models it is indeed separated from Gnd.  But in any case the general recommendation on all AVR models is to connect ALL Vcc and Gnd and decouple each pair.

 

paulrpotts wrote:
I'm not the hardware designer -- and not an EE -- but from what I understand, the board has a regulated 5.1V supply, which we will use for VCC. The idea was to also feed the battery voltage to an ADC pin to detect voltage drop. So in my code I've got a two values I'm looking at, to decide (with some hysteresis) whether to turn on a digital output indicating low battery.

Y'all need to decide--it is your app.  But IME "battery-powered" and "regulator" don't fit together.  I suppose you could have a big battery such as 12V SLA and you don't care that much about power drain?  Anyway, if there is a resistive divider giving you the 3.xV for battery monitoring, why not drop it down to about 1V?

 

More on regulator:  Switching or linear?  If linear you are probably getting a lot of losses.  If switching, that could explain some of your "jitter".

 

Examine that jitter.  Is it simply mains hum?  I find repeated readings and averaging of signals such as temperature and control voltage tend to get rid of it.  But there are a lot of other factors to look at, starting with ADC clock speed.  With a clean signal and clean Gnd/AGnd and clean Vcc/AVcc and clean reference you shouldn't be getting jitter.  Still jitter on the bench with a clean signal such as a battery cell?  If so, clean that up first.

 

 

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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I appreciate the clarification, and I believe you.

 

Atmel's datasheets are not as clear as they could be about this.

 

My datasheet is downloaded directly from this page:

 

http://www.atmel.com/devices/ATt...

 

The file link is: http://www.atmel.com/Images/Atme...

 

In that document, "AVCC" shows up very few times:

 

- 2.2.3 just says "AVCC" and "Analog supply voltage" with nothing further.

 

- In figure 22-1 under "Parallel Programming" it is shown.

 

- In table 23.5, as the parameter "Analog supply frequency" (incorrect), where there is no "Typ" value

 

- In table 23-6 "ADC Characteristics, Differential Channels" under "External reference voltage." where it mentions that VREF is min 2.56 and max AVCC-0.5, but as I am not using differential conversions that was not exactly clear.

 

There are NO OTHER occurences of AVCC in the datasheet outside of labels on pin diagrams or block diagrams. So again, thank you for the clarification, but in my defense, in the official datasheet for my part, none of that wording you helpfully emphasize is present. It would have been quite helpful had it been present...

 

 

Paul R. Potts - paul@thepottshouse.org

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Are you using the Automotive part?

 

Indeed, it is "interesting" why they would butcher a datasheet for the automotive flavour.  Perhaps it is edited as there are separate documents for automotive designs?

 

The rev. C datasheet for the '461A as well as the rev. F for the non-A have the same descriptions.  Both are dated 2011, while the automotive is somewhat more recent.

 

 

 

 

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Interesting, the one I referenced is http://www.atmel.com/devices/attiny461.aspx

David

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> Y'all need to decide--it is your app.  But IME "battery-powered" and "regulator" don't fit together.  I suppose you could have a big battery such as 12V SLA and you don't care that much about power drain?  Anyway, if there is a resistive divider giving you the 3.xV for battery monitoring, why not drop it down to about 1V?

 

> More on regulator:  Switching or linear?  If linear you are probably getting a lot of losses.  If switching, that could explain some of your "jitter".

 

OK, I will have to get back to you on that, as the EE I'm working with is in a meeting. Our application is entirely a battery-powered device. I think we are using a boost converter to go from a LiPo to a regulated 5V. It's not just for the micro -- other components on the board require regulated voltage.

 

When I'm a little further along in my prototype-building, I will be taking a look at the ADC accuracy. For my very first experiments, I did not even have any caps at all on VCC, and consecutive ADC readings were all over the map. Putting 100uF and 0.1uF caps on the voltage going to my VCC pin seemed to improve that quite a bit. But it looks like I should make a few more changes in my prototype board, like getting the AVCC pin properly connected, before I come to any conclusions about how accurate our ADC readings are...

 

>Examine that jitter.  Is it simply mains hum?  I find repeated readings and averaging of signals such as temperature and control voltage tend to get rid of it.  But there are a lot of other factors to look at, starting with ADC clock speed.  With a clean signal and clean Gnd/AGnd and clean Vcc/AVcc and clean reference you shouldn't be getting jitter.  Still jitter on the bench with a clean signal such as a battery cell?  If so, clean that up first.

 

No mains hum, and as above, I'll have better data when I have my power design looking a bit closer to standard best practices... thanks!

 

Paul R. Potts - paul@thepottshouse.org

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Yeah, our EE selected the automotive SOIC part for the actual board. For prototyping I actually have a through-hole part, to make my life easier. Why the data sheets differ so much, I couldn't tell you. My understanding is just that the temp and reliability specs on the automotive parts are a bit higher.

 

Paul R. Potts - paul@thepottshouse.org

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paulrpotts wrote:
My understanding is just that the temp and reliability specs on the automotive parts are a bit higher.

Well, it is a bit more than that, to be "automotive qualified" to sell to the car makers.

 

In many cases, mere mortals can pay a bit more for wider temperature range.  Now, I have no idea whether the true automotive-rated parts are just the same AVRs we buy from distis.

 

Anyway, you haven't really answered about the battery, and the "monitoring" circuit, nor the rational to have a regulator, whether linear, ...

paulrpotts wrote:
and consecutive ADC readings were all over the map.

ADC clock?  Show some code.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

Last Edited: Tue. Nov 8, 2016 - 10:22 PM
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>ADC clock?  Show some code.

 

I'm pretty sure it wasn't that. I think it was not having any decoupling on VCC at all. After I added some caps to my prototype board, I started to see much less chaotic ADC readings (within 3-5 LSBs of expected).

 

I'll get back to you on the rest...

Paul R. Potts - paul@thepottshouse.org

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Talking to our EE, the power supply design is because (1) LiPo power source... (2) several other devices on the board need a +5V supply, so we didn't want to have to do logic-level conversions between the micro and I/O pins on the other parts that the micro is driving.

 

It looks like we are actually going to use an external voltage reference, a little part that generates a +2.048V reference with +/- 0.04% accuracy. So we just hacked one of these little surface mount parts onto the prototype, now have that hooked up to the AREF pin with decoupling, and I'm going to test that playing with code starting tomorrow. This will require us to still use a voltage divider for our battery voltage, but it should be a lot more accurate than the internal 1.1V.

 

Thanks everyone for all your suggestions and advice. I've given our EE notes from Atmel's "hardware design considerations" and "EMC design considerations" and I think we will have all the pins nicely decoupled and filtered, so assuming this all works as expected in testing we'll go with it!

 

 

Paul R. Potts - paul@thepottshouse.org