I've been testing interrupt latency on t13s and t85s, and the datasheet numbers are way off. Table 6-5 (t13) & 6-7 (t85) both state 6 CK for start-up time from power down. So according to s. 9.2.1, INT0 held low for >6 clocks should be enough to wake up and run the ISR. I've found it takes about 32 clocks to cause the ISR to run, both for INT0 and PCINT. 2 clocks is enough to wake up from sleep and continue execution from the next instruction after sleep without running the ISR.
Has anyone else noticed this?
I checked for a simple mistakes like leaving the div8 fuse set, but it is not. I even did a test with PWM output to make sure my t13 was running >9Mhz.
To generate the wake-up pulses I used a USB-TTL UART, and used my Rigol scope to make sure the pulses have the correct timing.
In active mode interrupts work exactly as specified in the datasheet; INT0 latency is 4 clocks, and PCINT is 6. The PCINT synchronizer shown in figure 9-1 adds 2 clocks of latency.