ATSAML22N17A - How to select Generic Clock Generator 1 as source for DPLL96M

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I have an 8MHz external crystal oscillator to use, and need to generate 32MHz for the main clock to drive the CPU and buses.

 

Since 8MHz cannot be directly fed to the DPLL96M as it can receive 2MHz at the most,

I've fed the 8MHz XOSC to Generic Clock Generator 1 which divides it by 4 to generate 2MHz.

 

Now I need to feed this 2MHz as source to the DPLL96M.

From datasheet, the reference clock for the DPLL96M can be selected using the DPMMCTRLB register -> REFCLK[1:0] bits.

However, it only has the following options:

 

 

I guess I should select 0x02, but how can I specify that get the reference from Generic Clock Generator #1, and not from 0, 2, 3 or 4?

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Last Edited: Mon. Mar 9, 2020 - 03:19 AM
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Its a GCLK setting, Peripheral Channel Control for channel 1: GCLK_DPLL FDPLL96M input clock source for reference.

/Lars

 

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Thanks Lajon for the answer.

I didn't know that Peripheral Channel #1 is reserved for the GCLK peripheral.

I was also confused between GCLK (Generic Clock Controller) and the Generic Clock Generators which are numbered from 0 to 4.