ATSAME5x ADC DMA SEQEUNCER

Go To Last Post
2 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi 

 

I am struggling a bit with the DMA sequencer.

I use one DMA channel to fill DSEQ data on sequencer rdy trigger (just one word for input control) and a second channel for picking up results on result rdy trigger. this works fine as long as I am not using the averaging feature. if I do it seems like two adjacent input channels are mixed. seems like the sequence rdy trigger timing is off and the accumulator is still adding up values of the previous channel. 

is there something I can do? 

 

Thanks

 

Last Edited: Wed. Sep 14, 2022 - 11:34 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

So, it took me while to get back to this. 

 

I tried setting up priorities to the DMA channels so that the ADC Data-->SRAM is higher than SRAM-->SEQCNTRL, no luck. I also tried it reversed with higher DMA priority for the Sequencer, also no luck. 

At some point I'd love to hear from someone at Atmel/Microchip how that feature is supposed to work correctly.

Is it not allowed doing both transfers with DMA and the averaging feature of the ADC??? 

It works alright w/o averaging! 

 

My next step will be to fetch results via interrupt but I don't like it.