[ATSAMD51J18A-AU] PORT pin configuration

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Hi ,

 

I am new to AVR programming. Using Atmel Start configurator (Atmel Studio 7)  , i have created the project with ADC,SPI and Timer drivers.

 

I want to configure the PORT pins in ATSAMD51J18A-AU MCU.

 

Could anyone please tell me , which document i have to refer to configure the PORT pins  or providing any examples will be useful to develop the code?

 

Thanks,

Jana

 

 

Jana8153

Last Edited: Mon. Nov 19, 2018 - 09:40 AM
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I am new to AVR programming

Luckily you question has nothing to do with AVR programming (did you mean you are new to Atmel SAM and/or ARM maybe).

Probably you should read the datasheet (the PORT section) to know what is possible but if you use Atmel Start then you are supposed to configure ports using the PINMUX tab in the configurator.

When looking for examples to look at consider also the SAME5x examples (same datasheet).

/Lars

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Hi ,

 

We have gone through the SAM D5x/E5x Family datasheet and ASF4 API Reference Manual. Using Atmel Start , we have configured the SAMD51 pins to respective module (ADC,DAC,SPI). We have below query regarding clock configuration.

 

We are planning to use ADC 0 , ADC 1 , DAC 0 , SPI 0 , Timer 0, I2C 0 software components in SAMD51. We have not connected any external crystal oscillator to SAMD51.

Is it possible to use only internal clock (32.768 KHz) for entire system ( CPU,ADC0,ADC1,DAC0,SPI0,I2C0) ?  Will it be sufficient?

 

Clock_Block_Diagram

 

 

Also, is it possible to change the configuration later after creating project with start configurator?

 

Thanks,

Jana

 

Jana8153

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Normally you'd use the PLL to multiply the internal 32kHz clock to a more microcontroller-like frequency like 120MHz...

 

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read the errata for the ADC and DAC, especially noting that you must use the external reference voltage.

On the 1MSa/s DAC, note it can only attain a slew rate of about 400mV/us.

On the 1MSa/s ADC... just ask them WTF... it works to spec at some cases under 500KSa/s...

 

 

In Atmel studio, right click on the project and 'reconfigure start project'

jeff

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When you posted on uChip forums, I suggested DFFL, but in hind sight, use the DPLL0 with 32KHz in and 96MHz out.  120MHz is possible, and I use it; however some peripherals cannot work over 100MHz and this will save you some debug and datasheet issues later.  

jeff

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jcandle wrote:

When you posted on uChip forums, I suggested DFFL, but in hind sight, use the DPLL0 with 32KHz in and 96MHz out.  120MHz is possible, and I use it; however some peripherals cannot work over 100MHz and this will save you some debug and datasheet issues later.  

 

As per your suggestion , i have configured the DFLL at 48 MHZ using Internal clock 32.768 KHz as reference signal to DFLL. Can you please tell me what is the problem in using DFLL.

 

Also, in the same way, we have to chose DPLL at 96MHZ or that is different ?

Jana8153