I am planning on doing a Z80 project where I am going to have an ATMEGA64A be the I/O controller for the Z80. I am going to use the flip flop method that I've seen a few others do where the IORQ signal from the Z80 will trigger the WAIT signal to give the AVR time to fire an interrupt and process the I/O. An OUT instruction from the Z80 will be easy, just capture the low address (port) and data and release the wait. An IN instruction is a little trickier in that the AVR has to provide the data by switching its pins to output, but ONLY long enough for the Z80 to capture them and then it must switch them back to input so there is no contention. I've not tested it yet, but I'm hoping that:
clear flip flop
the distance between clear flip flop and ddr=0x00 is long enough for the Z80 to capture the data, but not long enough to be too slow to release the bus.
Well, anyway, I've selected the ATMEGA64A for this job and I was reading through the datasheet and noticed it HAS a memory interface. I plan on having a 128K SRAM (lower 48K in two banks, upper 16K common for CP/M 3.1). I plan on holding the Z80 in reset and accessing the SRAM directly so I can preload "ROM" into it at startup after doing a memory test. I had planned on doing the SRAM interface bit bang, but I wonder if the built in memory interface is worth considering? It looks like it shares the low address and data pins so that would be an extra component to latch the address I would think. I'm thinking it may not be worth using, but I thought I'd see what you guys think.
And yes, I know everyone has done Z80 projects to death! I think it is an interesting CPU and so I thought I'd do something with one!!!