ADC voltage range on ATmega128RFA1?

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I'm a bit confused by the datasheet.

The datasheet says:
"0-Vavdd ADC Input Voltage Range"
"Selectable 1.5V, 1.6V or VAVDD ADC Reference Voltage"
And then throughout the datasheet it refers to AVDD as 1.8V.

If I connect AVDD to ground with a capacitor, and connect AREF to 3.3V, will that give me 3.3V ADC without breaking anything? Or do I also need to set the AVDD bit to allow an external voltage, then plug it into 3.3V as well?

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bump

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Though it looks like pins won't exceed maximum it will exceed recommended.
Ref. datasheet section 34.10 (Avdd is 1.8v).
But internal power pins Avdd maximum is 2.0v, per section 34.1 Vana, so do not "... AVDD bit to allow an external voltage, then plug it into 3.3V ...".
See sections 32.1 (Basic Application Schematic) and 12.5.3 (Voltage Regulators).
Other than muxes and PGA, ADC runs on 1.8v.

"Dare to be naïve." - Buckminster Fuller

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I badly worded my OP . . . lets start over!

What I want to have is a 3.3V ADC. If I follow the application circuit it gives me a 1.8V ADC range. If I set AREF to 3.3V using an external voltage, it gives me 2.77V ADC range (nothing seems to break when I do that, but could it break?).

The datasheet says AREF must be below AVDD, and it appears to say AVDD can never be above 1.8V internal. But what you are saying is I cannot apply an external voltage above 1.8V to AVDD as well?

(in other words, there is no safe way to get the ADC above 1.8V range?)

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Quote:
But what you are saying is I cannot apply an external voltage above 1.8V to AVDD as well?
Correct. To be precise, above 2.0v per datasheet section 34.1 (Vana).
Quote:
(in other words, there is no safe way to get the ADC above 1.8V range?)
The PGA's inputs can be above 1.8v but its output should be limited to 1.8v. To measure 1.8v to 3.6v, apply AVDD of 1.8v to PGA negative input, 3.6v to PGA positive input, and set the PGA gain to 1x (assumes AREF is AVDD).

"Dare to be naïve." - Buckminster Fuller