ADC fast measurement question

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Hi there,

I need to take very fast ADC measurements. Reading the datasheet of the ATmega48PA I see that the ADC measurement needs 13 CPU clock to be executed. Also for 10bits measurements the ADC peripheral clock must be in the range of 50 to 200KHz and for 8bit measurements it can be more than 200KHz.

Having a crystal of 8MHz the minimum time for 10bit measurements is 8MHz / 64 (prescaller) = 125KHz, 1 / 125KHz = 8usec and 8usec * 13 (clocks) = 104usec

Is there any mistake on my calculations?

To be faster, I could switch to 8 bit measurements, but there is no definitions in the datasheet of which could be the Maximum ADC peripheral clock? The only thing I see is that it can be >200KHz

Thank you.

Michael.

User of:
IAR Embedded Workbench C/C++ Compiler
Altium Designer

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Quote:
Up to 76.9 kSPS (Up to 15 kSPS at Maximum Resolution)

So 15kSPS * 13 cycles is about 200 kHz,
and 76.8kSPS * 13 is about 1 MHz.

But you need a very low source impedance, because the ADC sample and hold capacitor must be charged during a smaller time frame.

Reading aloud the datasheed says with 200kHz or 15kSPS you can get 10-bit readings when source impedance is less than 10kohms. For 10-bit reading you need 6.93 RC time constants, while for 8-bit you still need 5.55 RC time constants. I guess you can extrapolate from that. Right now I cannot find how long is the sampling time of the signal, but I would approximate it to be 3 cycles out of 13 if 10 cycles are used to determine 10 bits in successive approximation style. Anyway it still scales in proportion : 15ksps*6.93/5.55=18.7ksps at 8-bit resolution and max 10k source impedance.

This one is wild thinking, so I may be wrong: Lower source impedance by order of 10 to be max 1k and the time constant drops also by order of 10, which in turn allows tenfold increase in sampling rate. However this is not guaranteed anywhere, there might still be some limitations in the ADC so it is possible it cannot perform 10-bit conversions if speed is faster than 15kSPS, even if source impedance was 0.

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Thank you very much for the very complete reply.

So, using the right passives for 10bits measurements, the minimum ADC time is !66.7us.

This is ok for me.

Michael.

User of:
IAR Embedded Workbench C/C++ Compiler
Altium Designer

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Sample time is 1.5 cycles as I recall....

Imagecraft compiler user