Active supercapacitor balancing for shortterm UPS

Go To Last Post
26 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi,

i am designing short term (>60sec of backup) UPS circuit based on supercapacitors for my low power i3 intel computer (12V, 5W). All i need is to provide safe turn off for my system in case of power outagge. So when main power goes off, usb command triggers computer shutdown process, which takes average of 45sec.  The circuit is composed of 4x 2.7V 20F capacitors that feed power to my step up converter (boost converter can hande 10W at 4.2 to 12V input to provide steady 12V output). 

In order to keep all capacitors at same voltage when charging, i thought of jsut using an already integrated low power MCU that i alreay use to control some signal LEDs, to simply watch individual capacitor votlages and in case of overvotlage appearing anywhere, jsut using mosfet to discard capacitor via proper sized resistor.

Are there any problems that i missed, with the attached circuit?

 

Kind regards,

Balancing diagram

This topic has a solution.

Last Edited: Wed. Mar 30, 2022 - 01:40 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Input voltage of ADC1..4 ?

How to startup the system ? (processor is not running yet; how do PA1..PA4 get switched ?)

 

Show us the complete diagram please incl charging supply

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Whole system is powered by wall AC/DC 12V adapter and is designed to run 24/7, so MCU starts runnign when i plug the system into wall socket. Only problem is if power outage would happen in 4min after system startup, since capacitors need that long to charge up. And since we expirience like 3-5 power outage per year, this is very unlikely scenario. 

I use MOSFET gate driver for each of mosfets.

I would use differential ADC input measurement for each of those (my STM mcu enables up to 4x differential input), so i would turn on transistor when voltage of each capacitor "cell" exceeds 2.65V and turn them off once voltage of capacitor falls below 2.60V, due to self discharge+discarge over resistor. I dont have rest of system designed to 100%, to be able to provide it, without causing confusion for anyone trying to help.

Charging voltage will be 11 V. (2.6V per capactiro whe nbalanced + 0.6V drop in reverse current protectiong diode).

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Klemko wrote:
my STM mcu enables up to 4x differential input

Does it also allow the input voltages upto 12V above Ground ?

 

Klemko wrote:
I use MOSFET gate driver for each of mosfets.

What do you mean by MOSFET gate driver ?

 

Klemko wrote:
I dont have rest of system designed to 100%

I understand but have you thoughts on how to swap between original supply and supercap-dc/dc  ? Or do you use the dc/dc output for continuous powering ?

 

How is the supercap charging done ? Are you using a constant current ?

 

Last Edited: Mon. Mar 28, 2022 - 10:21 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

No, this is might be no good.  

When one capacitor gets down near zero (assuming one can get that low) it will start to reverse charge & maybe be damaged.

Perhaps you are really shutting that one off?  It will be an interesting driver.

Before proceeding further draw the inherent body zeners in each FET. Ignoring them will set your socks on fire.

It may be far easier to wire the caps in parallel and use a boost converter, you then only need one FET (or perhaps two) for the booster.

Otherwise, with series you have mass duplication of circuits and non-ground referenced considerations to deal with.

 

edit:

you might look at some battpack control/balancing chips---they perform a lot of the grunt work I mentioned.  Maybe they will work with Caps as well, or perhaps there is pone specifically designed for that purpose.  

Their datasheets can be a mish-mash of hard to decipher descriptions, due to wordings (like soldering being called "welding")

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Mon. Mar 28, 2022 - 11:10 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi,

yes, the mosfet i use have builtin protection diodes, i used wrong symbol. In case anyone starts t orevrse charging, i wil lsee that as a negative votlage over it and i can simply "disable it" using mosfet. According to my math, with 5F total, the time constant of capactiros is 110s, so i should never get to 0 capacitance, before the whole system turn off. Also, as soon as load "computer" shuts down completly, it will turn off another mfet(or a small signal relay to get rid of mfet leacking current), thus disconnecting capacitors.

My thinking is that if i use capacitors in pararell, i have to boost 2.5V to 12V and deal with high currents(increase cost in many components) and high EMI in the step up converter, which might cause problems, once i get the product certified. 

Most of suitable "all in one package" ICs for balancing capacitors, will cost 8-10€(BQ33100, LTC3128, ...) so i was thinkign of going this way, since 4 mosfets and resistor are way cheaper.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

-Dont need up to 12V, since i measure differential votlage and ADC in mcu supprots non ground reference ADC conversion. 

 

-Mosfet gate drivers: https://si.farnell.com/c/semicon...

 

My thoughts i need to shed some light on with your help, are ones about charging the capacitors in this circuit diagram.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Klemko wrote:
-Dont need up to 12V, since i measure differential votlage and ADC in mcu supprots non ground reference ADC conversion. 

Thats interresting, may I ask which MCU you are using ?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0


Why are your caps drawn upside down?

 

 

FF = PI > S.E.T

 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Most of suitable "all in one package" ICs for balancing capacitors, will cost 8-10€(BQ33100, LTC3128, ...) 

I was referring to low cost import chips used in batt pack protectors

https://www.nisshinbo-microdevic...

however, they may not be suited anyhow (you will have to look)  ---look for one similar to bq33100

 

https://www.ti.com/lit/ug/sluu46...

also, see page 11.

Whoever drew it must like making a jumble, the RC's on the left belong at the gates (which they did for Q9)  ...doing the same for all 5 fets (resistor from gate to source & gate cap to gnd) would be hugely less scrambled in appearance.

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Here is a commercial example of a similar device, you may find it helpful to see how they did it:  https://cdn.shopify.com/s/files/...

Jim

 

 

FF = PI > S.E.T

 

This reply has been marked as the solution. 
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Klemko wrote:
Most of suitable "all in one package" ICs for balancing capacitors, will cost 8-10€(BQ33100,
1USD less for quad FET :

Precision Supercapacitor Auto Balancing (SABTM) MOSFETs | ALD Precision Analog Standard Products

due to

Balancing Supercapacitor Stack Voltages | Electronic Design

[2/3 page]

FET Balancing

...

The FET manufacturer can control the threshold voltage with ion implantation of a floating gate, or by process, or by hand-selection. 

...

Some FET manufacturers will bin by VGS-off.

"Dare to be naïve." - Buckminster Fuller

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Don't have one picked yet, but will must likely be one of STM32L0 family. Most of this family of mcus we used support differential voltage higher then supply voltage of MCU, just as long as Vp-p of analog input is smaller then Vcc. 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Dang, great idea! Never thought of using battery protection ICs. Will check em out, to see if anyone fits my project.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thanks, will study provided circuit diagram.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Wow, didn't come across  these SAB mosfets. Sound like something engineered exactly for my project. 

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

 once i get the product certified. 

 

Wow, pretty hard core rolling your own design from discrete components when there are chips that are designed specifically for this!

 

There might be a rather steep learning curve to match the overall design performance for the chips that were designed just for this purpose.

 

JC

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

 

I have difficulty understanding the usefulness of these Advanced Linear Devices SUPERCAPACITOR AUTO BALANCING (SAB TM) MOSFET ARRAYs.

 

I have a set of 6 series connected Maxwell BCAP3000 K2 Ultracapacitors that I want to protect during charging. They're rated at 3,000 Farad at 2.7 Volts (operating), absolute maximum 2.85 Volts and maximum leakage current specified at 5.2 mA.

 

The ALD SABMBx 2, 4 or 6-Channel Supercapacitor Auto Balancing PCB data sheets state:

It is suited for balancing supercapacitor stacks ranging from two in series to hundreds in series, and for supercapacitors of 0.1F to 3000F and beyond.

 

Looking to keep individual capacitor voltages under the 2.7 Volt specification while charging, I would select SABMB624 PCB assembly utilizing 3 of the ALD910024 (2.4 Volt threshold).

 

The ALD810024 is specified:
Gate Threshold Voltage of 2.40 Volts with VGS = VDS; IDS(ON) = 1 μA.  
Active current ranges from <0.3nA to >1000μA.
Absolute Maximum Operating Current 80 mA.

 

For VIN (each capacitor) the MOSFET Output Current (to bypass the capacitor) and RDS(ON) are listed as:

VIN        μA          MegOhm
2.00     0.0001        20,000      
2.10     0.001         2,100
2.20     0.01          220
2.30     0.1           23
2.40     1             2.4
2.50     10            0.25  
2.64     100           0.026     <<<
2.74     300           0.009
2.92     1,000         0.003
3.22     3,000         0.001
3.82     10,000        0.0004

 

For the 6S BCAP3000 stack, picking a very slow charging rate of 100 mA would raise each capacitor by about 0.15 Volt/Hour. At 2.64 Volts the ALD810024SCL MOSFETS would be bypassing 0.1 mA. This charging rate appears to exceed the capabilities of the ALD910024 to limit the charging Voltage by a factor of around 1,000.

 

These ALD devices, by themselves, look capable of protecting supercapacitors to up to around 3 Farad with charging current limited to around 1 mA.

 

Am I missing something here?

 

My solution seems to be individual precision voltage shunts similar to this circuit:
http://www.discovercircuits.com/dc-mag/Issue_3/Photos/SuperCapVoltageLim.pdf

 

Last Edited: Wed. Mar 30, 2022 - 12:15 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

sbennett wrote:
Am I missing something here?
Current division (super-capacitor leakage, SAB channel resistance)

SAB : 80 mA max, factor of 4 minimum for conservative margin, 80 mA / 4 = 20 mA >> 5.2 mA (well, not quite much greater than)

sbennett wrote:
My solution seems to be individual precision voltage shunts similar to this circuit:
Some shunt regulators have 100 mA max operating (150 mA absolute max) and are in SOT-89 (should have enough junction temperature margin) though TO-92 is common (press-on heatsink)

 


The Fundamentals of Supercapacitor Balancing (Advanced Linear Devices)

[bin the supercapacitors]

[top of page 3]

The next step is to choose a balancing method suitable for the currents involved. For example, if the leakage current spec is 23 µA, a SAB MOSFET could be used to balance leakage currents up to 230 µA (up to ten times the nominal max leakage current value).

With the balancing method determined, it's time to place two similar leakage-tested supercapacitors in series and power them up. For example, if the voltage rating is 2.7 V for each cell, then the two-cell stack may be operated at 5 V, which leaves a 0.2 V voltage margin. A more conservative operating voltage range may be 4.2 to 4.6 V instead of 5 V.

[bottom of page 4, first sentence in last paragraph]

All in all, engineers need to test cells individually to get a more accurate reading of individual capacitance and leakage current values.

...

Robert Chao, Advanced Linear Devices Inc.

via https://aldinc.com/ald_support.php

 

SPX431A via SPX431A - MaxLinear

 

edit : not in EOL is AP431S (Voltage References)

 

edit2 : low IK

NCP431 via NCP431: Voltage Reference, Low Cathode Current, Programmable, Shunt Regulator (onsemi)

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Wed. Mar 30, 2022 - 02:26 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 1

Klemko wrote:
-Dont need up to 12V, since i measure differential voltage and ADC in mcu supprots non ground reference ADC conversion. 

Klemko wrote:
Don't have one picked yet, but will must likely be one of STM32L0 family. Most of this family of mcus we used support differential voltage higher then supply voltage of MCU, just as long as Vp-p of analog input is smaller then Vcc.

That would be very nice... but in the datasheet [I picked stm32l041f6.pdf] it says :

- VAIN [Conversion Voltage Range] = 0 to VDDA

 

Sorry, I dont want to be picky but better to doublecheck than making a mistake... In my opinion analog processor inputs (also differential) do not support voltages higher than then analog supply

You will need an external differential opamp supporting voltages above its supply or another external measurement diagram

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Most of suitable "all in one package" ICs for balancing capacitors, will cost 8-10€(BQ33100, LTC3128, ...) so i was thinkign of going this way, since 4 mosfets and resistor are way cheaper.

 Remember, if you put the caps in parallel, no balancing is needed (but you'd need a buck to generate the lower charge voltage from whatever supply you use, and a boost to bring it back to 5v?)

Wondering if there are "power brick" chips to already do all this (buck, charge, boost), they'd be used in the "power packs" that are very common.

an example (they have a variety, worth taking a look)

https://www.analog.com/media/en/...    ...capacitors can be stacked

 

...oh I see, the $$$ is high...need to find the Chinese equiv, which will probably be $1   

 

 

here is a paper, but just uses normal power supply chips

https://www.ijeat.org/wp-content...

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Wed. Mar 30, 2022 - 08:01 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

In your case yes, but i don't use same GND(I use 1:1 isolation dc/dc bcs of some safety reasons and to isolate noise due to some of my project using uV measurements) for capacitor stack and the MCU, then it doesn't matter. The MCU wont see voltage potencial from top capacitor to GND, but only voltage difference between 2 analog inputs.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Klemko wrote:
In your case yes, but i don't use same GND(I use 1:1 isolation dc/dc bcs of some safety reasons and to isolate noise due to some of my project using uV measurements) for capacitor stack and the MCU, then it doesn't matter. The MCU wont see voltage potencial from top capacitor to GND, but only voltage difference between 2 analog inputs.

Ahh, that explains. Thanks for the answer

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

but i don't use same GND(I use 1:1 isolation dc/dc bcs of some safety reasons and to isolate noise due to some of my project using uV measurements) for capacitor stack and the MCU, then it doesn't matter. The MCU wont see voltage potencial from top capacitor to GND, but only voltage difference between 2 analog inputs.

That still doesn't cut it.   If the stack is wired to the adc differentially per cell (nonisolated), it will still experience the overrange stack of voltages. 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

gchapman wrote:

 

SPX431A via SPX431A - MaxLinear

 

 

edit : not in EOL is AP431S (Voltage References)

 

edit2 : low IK

NCP431 via NCP431: Voltage Reference, Low Cathode Current, Programmable, Shunt Regulator (onsemi)

 

 

That is very helpful, I'd been thinking I should look at the xx431 series of regulators...

I have 10 of the NCP431 parts, acquired after noticing them in AOE X Chapters section on Floating High-Voltage Current Sources, figure 3x.62

The xx431 shunt voltage of 2.5V leaves a margin of 0.2V to the Maxwell BCAP3000 specification, can't get much better than that.

 

The NCP431 with a divider of 40KΩ and 100KΩ (25μA) to the reference, for a shunt voltage of 3.5V may work for LiFePO4 cell protection also.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

may work for LiFePO4 cell protection also

 

Note that these FETs perform mostly balancing of the caps, they don't offer much in terms of protection from a serious power source that exceeds the nominal stack voltage (a voltage that they can't drag down).  They even out the voltage per cell at a somewhat trickle rate.  So if a widely variable overvoltage is applied, it must be limited in current elsewhere to prevent overworking these FETs; they are lightweights in their instantaneous protective capacity.  They seem, perfect for low energy nudging of the cells.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!