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Hi,

I'm using a POT as an input for an ATtiny-based project, where the POT is read by ADC to give me an input value. My question is: What's the best POT (max) resistance for that type of use? I would think greater resistance would be somewhat better as it would be less of a power draw. But I wonder if at higher resistance the signal is less stable in that the ADC circuitry could throw it off in the way a ~10k pull-up resister can be overwhelmed. That concern is just an intuition, I've not seen anything to suggest it's something to worry about.

To be clear, I'm the POT as a voltage divider: attaching one side of the POT to Vcc, the other side to Gnd, and the swiper to the ADC input pin.

Thanks!
Tim

The datasheet says optimum source impedance is 10kohm or less. It is left as an excercise why this means a 40kohm potentiometre, or smaller.

Also people use 100kohm pots and a 100nF filter capacitor on the wiper succesfully.

I see a few important specs in the data sheet
1) The 1uA leakage current, this would cause 1mV offset for every 1K of source impedance, this would be temperature dependent because the leakage is sensitive to temperature.
2) the 14pF S+H cap. It needs to be charge through the source. The capacitance is such that if you had 1M in series it would charge up to its final value (5xRC seconds to reach 99.5% of its final value) in 70us. Now it would not always be charging up all the way from 0 so it actually responds better to an AC waveform but it only has a 2 clock cycles to charge from its former value to the new value. This quick chargeup is why a cap to ground on the ADC input pin helps so much.

Bottom line(s)
- for a 3.3V Vref and 10 bit conversion you need less than 3.3K to be able to ignore 1uA of I/O Pin Input Leakage Current (it will cause less than 1lsb of error)
- If you want to sample high frequencies you had better reduce the resistance even more because 3.3K with say 1nF capacitance to ground will have a bandwidth (3dB breakpoint) around 48KHz.

If you use a pot to select a voltage you are always going to have less than half its resistance as a source resistance, the most resistance will be when the pot is set midway and you have R/2 to Vcc and R/2 to ground. This means you have R/4 total source resistance. 40K pot looks like 10K in this case.

Hope this helps, but be sure to check the calculations above. I also have no idea why the input resistance of 100M is even given in the data sheet, for DC it is swamped the the leakage current and for AC the 14pF cap will dominate. Also, the data sheet (in section 23.6.1 in the 168 data sheet) shows 1-100K resistance in series with the S+H cap. This is quite high and is probably the reason for the 38.5KHz input bandwidth spec. No external capacitance can help this.

Klave

edit) If you want to reduce power consumption, drive the pin with an op amp follower, they have low output impedance and can be found drawing only a few uA if you are OK with lowish speed.

Lots of thanks to both of you. You've highlighted some issues that my coarse electronics knowledge wouldn't catch. My first throught was, great, I'll read up on impedance, figure out why Jepael says it means a 40K or less Pot, understand what Klave is explaining, and gain some knowledge in the process.

I did do some reading, but I'm sorry to say I didn't manage to gain an understanding of all the comments from both of you.

I'll read up on this some more, but for now I'm going to plan on a 5K pot. The power consumption isn't critical, but I don't want to be wasteful and unnecessarily use up the capacity of my 5v voltage regulator (1A I think). If I understand this, I could use 1000 5k pots, so the two I need aren't a significant burden. I just wanted to make a thoughtful choice.

Thanks again!

When a 40 Kohm pot has wiper (pin2) in the middle position, it has 20 Kohms to pin1 and 20 Kohms to pin3. Which means that when pin1 and pin3 are some voltage source like 5V supply of the AVR, pin 2 has 10 Kohms output impedance.

I agree, smaller pot suffers less from leakage currents, never thought about this. 5K pot should be okay as it wastes 1mA, which equals 5mW, so it hardly causes any heating problems either.

Too large pots will cause some false readings as they cannot charge the ADC sampling capacitor fast enough, but even 1Mohm pot should work if you have a bypass capacitor from wiper to ground. Even a 100nF capacitor will then have a RC time constant of 0.1 seconds and is big enough not to sag when sampling capacitor is charged. Only thing is that if sampling frequency is very high then voltage will sag, as then it is in essence a capacitive divider network.