1-Wire Master with other simultaneous tasks

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Hello all,

I'm just trying to solicit some opinions for the early stages of a potential project.

We have some batteries (legacy requirement, so we can't change that) that interface via Dallas 1-Wire and specifically use parasite power for wake-up. Our old design used a PSoC as the master, but we have no desire to return to that chip.

Our preference is to use an AVR (and preferably an XMEGA, given that's our recent design experience and tools), but do not AFAIAA have a native 1-wire implementation.

Because of other time-critical tasks that the chip will be required to perform, we cannot bit-bang, and I am somewhat skeptical of simply reacting to a timer for individual bits.

We're thinking something like the DS2482-100 http://www.maxim-ic.com/quick_vi.... Any opinions or experiences from anyone? What have other people done in the past?

-- Damien

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Use a 2nd AVR, perhaps one of the tiny's to act as a 1-wire UART, and bit-bang it from there. Or if you have a CPLD or FPGA on your board, you can put a 1-wire UART in there. Having said that, is your timing really so critical that something can't be delayed by one bit time on the 1-wire bus? The only part of the 1-wire comms that needs to be atomic is that of a single bit frame. The inter-bit gap is unimportant, thus you could service as many tasks as you want/need in that space.

Writing code is like having sex.... make one little mistake, and you're supporting it for life.

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glitch wrote:
Having said that, is your timing really so critical that something can't be delayed by one bit time on the 1-wire bus?

Probably not - we've done it that way before, but there's a lot of other comms going on that we need to react to, rather than simply schedule so it is difficult to guarantee that we won't lose a transaction somewhere.

I'm not sold on the second AVR - it's another annoyance to worry about programming (code and production) at a price in the same ballpark as the I2C bridge. Nice idea though.

-- Damien