Berben Peter 
Hi,
Does any one have experiance with exchanging data between AVR and PC104+ using ISA/PCI bus?
Are there standard components that I can use (PCI bridges, Dual port RAM, FIFO's, etc..)?
Are there design/application notes that I can read?
Please advice me... :roll:
Kind regards,
Peter
Stelios-k 
I think you should forget about interfacing the AVR to the pci bus directly (i.e without a pci bridge chip like PLX or an FPGA) as the pci bus has a speed of 33 (or 66) MHz.
The ISA bus runs at about 8MHz and it's possible to "emulate" it to drive isa bus cards.
It'a allready been done. check
http://www.avr1.org/eavr/eavr.html
http://liquorice.sourceforge.net...
Berben Peter I think you should forget about interfacing the AVR to the pci bus directly (i.e without a pci bridge chip like PLX or an FPGA) as the pci bus has a speed of 33 (or 66) MHz.
The ISA bus runs at about 8MHz and it's possible to "emulate" it to drive isa bus cards.
It'a allready been done. check
http://www.avr1.org/eavr/eavr.html
http://liquorice.sourceforge.net...
leon_heller 
Stelios-k wrote:Thanks,I think you should forget about interfacing the AVR to the pci bus directly (i.e without a pci bridge chip like PLX or an FPGA) as the pci bus has a speed of 33 (or 66) MHz.
The ISA bus runs at about 8MHz and it's possible to "emulate" it to drive isa bus cards.
It'a allready been done. check
http://www.avr1.org/eavr/eavr.html
http://liquorice.sourceforge.net...
But with interface I mean a PC104+ module and a AVR should be able to exchange data over the PCI/ISA bus.
For example, dual port SRAM allows two different processors to access one common SRAM area, therefore share information.
PCI has *very* strict interface requirements, necessitating very careful design. For instance, all the PCB tracks have to be the correct length, because the bus depends on reflections. You will only achieve this with something like one of the interfaces mentioned above.
Leon
glitch 
Are you expecting the AVR to be a target or host on the bus?
If as a host, you can do PC/104 (not PC/104+) fairly easily. PC/104 is based on ISA, which uses discreet logic for decoding, so you can slow the clock right down as much as needed to interface with it.
If as a host on PC/104+ using the PCI interface, you likely will not be able to meet the PCI interface requirements. You may be able to find a local bus to PCI host bridge that you can interface with, even then the AVR isn't likely going to be fast enough, or have enough resources, to manage the PCI bus. All PCI host bridges that I know of, expect a 32bit local interface bus.
If as a target, no matter which bus, you will require some sort of dual ported asynchronous interface bridge between the AVR and the bus. The AVR simply is not fast enough to be a direct target on either bus in real time. I've used FPGA's and CPLD's to accomplish this buffering task on several occasions, with good success. For PCI I typically use a PCI I/O accelerator (see PLX technologies, check out the 9052) in front of the FPGA or CPLD. (The FPGA or CPLD is still needed as the local bus side, typically, still runs too fast for the AVR)
Note that if the bridge supports a memory bus, a dual ported SRAM could be used instead of the FPGA or CPLD. Though my preference has traditionally been for the programmable logic solution.
Berben Peter I see you have more experiance in this mather than me.
I was awaire that AVR interfacing to PCI (either as host or target) is a hard job to do, now I know for sure.
And I prefere to keep it simple!
AVR interfacing to ISA a have been experiancing myself (with FIFO's).
Unfortunatly ISA is fading away, even PC104 boards are more and more migrating to PC104+ and PCI104.
Does any one have good experiance with AVR sending data in "realtime" to PC's.
I'm thincking about firewire, USB, CAN, etc...
Please advice
AndyG 
I have recently got high speed USB comms running using an FTDI FIFO chip.
They also make a serial comms variant.
The devices really are easy to use and the PC support software good too.
Hope that helps
/Andy
p.s. For the record we also got a PCI design up and going relatively easily using a PLX 9030 PCI bridge chip and a dual port RAM.
glitch Another option, if the AVR is on the same board as the host CPU, is the LPC bus. The LPC bus can be decoded relatively simply using a CPLD to provide an ISA interface to your existing ISA designs (or any local interface). For my embedded designs, using the LPC, has been my most common approach lately.
LPC is intended to be routed on the main board only, and not through connectors. Though it is not expressly forbidden to do so, there is just no standard connector defined, so whatever you do it will be proprietary. (Do I hear LPC/104?? :P )
Don't be too afraid of the PCI. The PLX parts do make it much easier, and you can leverage your existing ISA based designs with them.
Berben Peter I see,
have been reading some information regarding the PLX 9030 PCI bridge.
This is, if I understand it correctly, a PCI to ISA bridge or can imitade it?
So PCI to ISA, ISA to DP-RAM, DP-RAM to AVR.
If not is there some ref. design I can view?
Thanks Peter
AndyG Don't know all the details, as I'm primarily a software person rather than hardware, but as we used it the 9030 acted as a bridge between a PCI bus and a dual port RAM.
Then we had the embedded microcontroller access the other port of the DP-RAM.
Is this commercial or a hobby/ student application? We could probably provide you a circuit fragment, depending on application.
Obviously, if it's commercial and you are in the same industry (unlikely) then that would be silly, wouldn't it?
Cheers
Andy
Berben Peter Thanks,
The info I'm requesting is intended to be used in an instrumentation project for the company I'm working for.
Then again, my request for ref. designs, was to become a better understanding in the how-to use the PLX.
It was not intended to share your companies information with me, I didn't expect it would be that easy 8)
Regards
