I was looking at the Atmel implementation of saving the the global interrupt state and disabling interrupts. It looks like it has a slim window of vulnerability. I do not have a real issue so this is a theoretical observation.
Here is the implementation that caught my eye.
static inline irqflags_t cpu_irq_save(void)
flags = sysreg_read(AVR32_SR);
The window of vulnerability is from reading the flag to disabling it. If an interrupt would happen between these instructions that modified the state of the enable, it might get restored to something incorrect. It may be more error prone in an RTOS like FreeRTOS.
Many processors have an atomic read state and set bit instruction. There is 0 vulnerability.
Are there better implementations than this?