Mega128 External Memory Interface question

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There is an Driver in Wiznet website which drives a W5300 TCP/IP controller through Mega128 External Memory Interface. W5300 registers are mapped into Mega128 Memory Space. (W5300 has 8Bit Data Bus and 10Bit Address Bus).

PORTA[7:0] connects to Data Bus and PORTC[7:0] connects to Address Bus.
Question is W5300 has 10Bit Address Bus. What happens to last 2 bits ?
Looks like PORTA is also External Memory Interface Address Bus (A0 ~ A7). So how does this Port work? When its a Data Bus and when its an Address Bus?

Also what about W5300 CS and RESET pins? Where to connect them ?
ALE in Mega128 is Active High. Right? Because CS is Active Low in W5300.
Has anyone ever used that code ?

Last Edited: Fri. Jul 12, 2013 - 05:20 PM
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Wiznet's own WIZ200WEB board consist of an ATmega128, external RAM and a W5300 so I imagine it's very close to what you require. See this:

http://www.wiznet.co.kr/Sub_Modu...

In particular at the bottom of the page is a link to the schematic. It leads to:

http://www.wiznet.co.kr/UpLoad_F...

In the circuit they us 74AC573 (U2) as the latch for the upper address lines issued by the mega128 (U3). The 16 bit address bus A[0..15] that this produces connects to the HY62256 (U1) SRAM chip and the W5300 (U11).

As you can read in the user manual PDF the SRAM maps from address 0x1100 to 0x7FFF and the W5300 appears in the address map at 0x8000 to 0x83FF.

As this has nothing to do with avr-gcc I'll move this thread from GCC to AVR Forum.

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Hello. I have a question here.

In the W5300 datasheet, version 1.1.1, page 120 and 121, the waveforms give us a tCSn, described as /CS next assert time.

Now, the way I am reading this, it looks like they want to say that /CS MUSTgo up in order for w5300 to accept the next word.

But from the WIZ200WEB schematic and from the code, it is obvious that A15, which is the //CS for the W5300, will never go up in case of consecutive readings/writings in the chip.

Is the datasheet written in a wrong way or is it that I don't understand it correctly? Or is it that every address bit goes to zero before obtaining their new value, and therefore A15 goes to zero and /CS goes to one and we have the toggle needed?

I would like a bit of clarification here if someone knows.

Thanks a lot!
Bill.

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No /CS toggle is needed.

 

In consideration of others, please RTFM!