I've got some time-critical assembler code that I want to run from the fastest memory on the AT32UC3A364, which I thought would be local SRAM (0x00000000 - 0x0000ffff).
What I did to get the code "booted" into SRAM was to just use a .section .data directive before the assembly code instead of .section .text. My assumption (which appears to be correct) was that the code would be in flash then copied to SRAM by the startup code just like any other initialized data. This seems to work fine as the code is indeed in SRAM and its all there and it seems to run perfectly. Except for one thing... It runs at about 1/5 the speed of the same code from flash. My measurement of the speed is to generate a pulse and measure it with a scope. When the code runs from flash the pulse is 180nS. When run from SRAM, the pulse is 900nS wide. The code that generates the pulse runs with ALL interrupts disabled and only touches local GPIOs (0x4000xxxx).
Doesn't the SRAM "run" at the same speed as the CPU i.e. no peripherals or HSB accesses are involved?
I appreciate any and all comments.
Thanks very much!