ATtiny 25 - Analogue Comparator

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First of all I apologise if this has been covered elsewhere, but I'm blowed if I can find it.
I'm looking for information specifically relating to the hysteresis of the analogue comparator. The data sheet tells me everything but what I need to know and I've searched everywhere I can think of without luck.
Has anyone seen this data or know where I can find it please? Maybe you've used the comparator and know what these figures are likely to be?

I have the comparator working ok and at the moment I am comparing two voltages on AIN1 and AIN0. For the moment I have AIN0 connected to the internal 1.1 volt reference. AIN0 will ultimately be connected to an external reference - probably.
The issue I have is this, I am finding something like 10 to 15 millivolts of hysteresis between the comparator upper / lower trip points. Coming from an analogue background, that seems rather a lot to me. Now bearing in mind that presently this is all running on a STK500, it is possible there may be noise issues here. I am considering breadboarding this project with proper decoupling etc to see if this makes a difference but it would be nice to know beforehand if the hysteresis I am seeing is 'typical', noise induced or something else maybe. If I could get this figure down to something like 2 to 5 millivolts, that would be good. Otherwise I'll have to go with an external comparator and my 'neat one chip solution' will be sunk.

dylan85

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Perhaps consider using the ADC channels for your compares.

It all starts with a mental vision.

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Well not much in the way of answers, so I decided to measure it.

It turns out to be around 5mV. BUT....
There is noise on the AIN signal / comparator input and it would appear to be internally sourced / generated. So I would say that if the system clock were stopped this figure would improve.

Also, the AIN input is very sensitive to noise pickup. It is not a low Z input.

So, lesson learned and for the sensitive application I have in mind, an external comparator will do the job by feeding into the analogue comparator or an interrupt pin.

d

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Unless you need fast response time the ADC method should work.

Set the ADC ref for 1.1V, that will give about 1mV per ADC count.

The noise floor of the system will likely be common mode. It might be possible to take multiple interlaced readings from the two channels, average (or filter) them, and compare the difference.

You can the set your desired thresholds with integer compares, based on empirical experience.

Perhaps others will improve my suggestion.

It all starts with a mental vision.

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Quote:

So I would say that if the system clock were stopped this figure would improve.

Why would you say that?

I'm a bit confused on what types of apps would be sensitive to a few millivolts of hysteresis.

As mentioned, why not just do continuous conversions on that signal and "trip" on a certain ADC count value?

And when you do that, you will find that creating a squeaky-clean analog subsystem is not trivial. There are all sorts of noise sources, from ripple on AVCC to mains hum on the signal leads from office lights. So you end up averaging or other filtering anyway. I can't see where the situation would be any different with the AC vs the ADC.

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Quote:
Unless you need fast response time the ADC method should work.

I agree, and that may well be my next approach. The only reason I am persuing the analogue comparator is because this is the first time I have had reason to use this function and I'm trying to see how far I can push it for future reference. It's all part of the learning process.

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Why would you say that?

Maybe I should have been a bit clearer in what I meant to say? The fact that there is a noise reduction mode for the ADC whereby certain clocks are inhibited to reduce induced noise, suggests to me that an element of this noise could also affect a sensitive input like the analogue comparator as well as the adc.

Like I said above, all part of the learning process. I'm just trying to ensure I'm giving this particular function it's best chance to perform as intended.

dylan85

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Quote:

suggests to me that an element of this noise could also affect a sensitive input like the analogue comparator as well as the adc.

I doubt it, IME. But then again I work with industrial/commercial apps to handle the real world. Short answer: Give your signal more drive.

With a lash-up as you describe you probably have ripple and noise all over. As I mentioned, a rock-solid analog design isn't trivial. Before worrying about what effect the AVR clock >>might<< have, get your entire analog subsystem absolutely rock solid--THEN measure the clock effects. Generally, since real-world signals aren't that pure anyway, it isn't worth the effort/expense. But if you are creating a lab instrument ...

And given the above, you are starting with an AVR model that doesn't have a separate analog subsystem (AVcc etc.) to start with.

So I'll stand behind my "why would you say that".

Perhaps if you >>tell<< us about this low-drive signal that needs to trip the analog comparator with less than 1% hysteresis, we'd be more interested.

BTW have you thought about handling all the false trips if there >>is<< very little hysteresis when the input signal is hovering at the trip point?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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None of the Mega/Tiny comparators have any specified hysteresis.

Looking at the Mega48A, as a basic example, the offset can be as large as 40mv. Note that it says nothing about the "offset" being the same rising or falling. So, I would not be at all surprised to find some hysteresis that MIGHT be as much as 80mv.

Jim

 

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In every application I have used a comparator for, I wanted more hysteresis, not less. I also would prefer the measured signal to go quickly through the trip points as opposed to slowly, but unfortunately, that is not often enough the case. Extremely low hysteresis is likely to cause unwanted oscillation near the trip point, and I have not witnessed an example where that would be desired...

Maybe you could expand my horizons with an example of why you need the hysteresis so small? Anything I have thought of would benefit from pre-amplification rather than allow the signal to vary so little around a trip point.

-fab

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When the ADC is used as I suggested, by looking at the difference, the common noise most likely will drop out. The interlacing of samples helps make the samples common. If multiple samples are taken over the time of a complete AC line cycle, that may help reject that.

As others suggest if the signals you desire are down in the mud, more serious design steps need to be taken to solve that first.

I used to be an old analog guy. I now use AVR, with timers, ADC, and PWM to complete many tasks, not op-amps.

It all starts with a mental vision.

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Having had the weekend to think about other things and then re-reading my previous posts it seems I am guilty of lack of clarity and poor explanation.
In my original post I described measuring the comparator hysteresis, this was primarily to give me an idea of how this comparator would perform compared to a more conventional comparator. I wasn't intending to imply that I needed very low hysteresis, the idea being that this measurement would give me an idea of how noisey things were likely to be around the switch point.
In that respect I do now have the information I require. I made up a small prototype board so I had a more controlled layout ensuring the supply rail and AREF were suitably decoupled. The comparator seems reasonably good with a measured hysteresis of around 2mV. I did find in the process that using a 'switch mode' wall wart supply degraded this figure quite noticeably and replacing this with a linear supply was much better.

Quote:
In every application I have used a comparator for, I wanted more hysteresis, not less. I also would prefer the measured signal to go quickly through the trip points as opposed to slowly, but unfortunately, that is not often enough the case.

I agree, and in my application, the analog input voltage changes quite rapidly between two well defined datums and my task is relatively trivial in detecting the lower datum, hence the use of the comparator. I do accept, as has been pointed out that the adc and software filtering is an alternative, and maybe better solution.
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I used to be an old analog guy. I now use AVR, with timers, ADC, and PWM to complete many tasks, not op-amps.

... and thats where I'm heading. One step at a time by asking seemingly stupid questions and making measurements to confirm my understanding or otherwise.
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It's all part of the learning process.

Thanks for all the inputs, it is appreciated and I promise to take more time over my explanations in future.

dylan85

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Quote:

I wasn't intending to imply that I needed very low hysteresis,

...but you posted:
Quote:

I am finding something like 10 to 15 millivolts of hysteresis between the comparator upper / lower trip points. Coming from an analogue background, that seems rather a lot to me.

And there were no direct responses on why you'd want low hysteresis, nor on how you are going to handle cascading hits when the signal is hovering around the trip point. I'm out.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Sometimes a digital circuit may need some sort of analog help(in your case,the back end). I understand what you are experimenting with and offer a possible solution. I'm not going to give specifics,but digital electronics can be configured to have the capability of "learning".
A good example of analog "learning" is the memristor. A comparator that switches on and off continuously is not what we desire. A Schmitt Trigger can be an option. IMHO ...........try experimenting with a memristor,then incorporate that into your circuit. to keep this short........voltage is "one" aspect.....current is another. Please try to keep your options open. Tschuss!!!

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You realise that the last post in this thread was almost exactly a year ago?

Moderator

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Maybe it took a year or so to type all those periods in the message? :wink:

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