I've got an interesting issue with logic high. Ive got an ATmega644, 44pin package.
Ive got a chunk of simple code (among a lot of other code):
#define oc0STRT 0 #define oc1ACC1 1 #define oc2ACC2 2 #define oc3LOCK 3 #define oc4ULCK 4 ... DDRC = 0; DDRC |= (1<<oc0STRT) | (1<<oc1ACC1) | (1<<oc2ACC2) | (1<<oc3LOCK) | (1<<oc4ULCK); PORTC |= (1<<PINC5) | (1<<PINC6) | (1<<PINC7); ... init(); PORTC |= (1<<oc0STRT); PORTC |= (1<<oc1ACC1); PORTC |= (1<<oc2ACC2); PORTC |= (1<<oc3LOCK); PORTC |= (1<<oc4ULCK); while(1);
These outputs are driving npn transistor gates which drive relays.
Some work, some dont though:
if I probe:
pin c0: 5V
pin c1: 5V
pin c2: 1.1V
pin c3: 1.1V
pin c4: 1.1V
There are no short between neighboring pins, and the resistance between each respective pin and: ground, 5V, and input gate: are all the same.
Any clues on this one?