External Interrupt INT0

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Hi everyone,

while coding yet another DCF77-Decoder, I encountered another problem with my at169V-Based butterfly. I want the DCF-Signal to fire an interrupt at my MCU each time the state changes.

For this, I connected the DCF77-signal to PortD1 (INT0). In the code, I defined a interruptvector for EXT_INT0, declared PortD1 as Input with pullups turned on, enabled the EXT_INT0-Interrupt in the EIMSK-Register and defined INT0 to fire interrupts on logical state change in the EICRA-Register, globaly enabled interrupt by setting Interrupt-flag in the Flagregister (sei) and let the code end in an infinite loop. The Interruptroutine toogels another Port-PIN previously declared as output to display interrupt-occurance.

Question: is there anything I missed, that no Interrupt is fired? Does anyone have a sample code for me to look at?

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Hi monarch,

That's a fair amount of code to ask for an example about. It would be easier if you could post what you have instead. No need to feel intimidated, we all have to modify/add things.

Your basic description sounds like you're pretty much there, but the sequence of things is everything. I'm not sure if the interrupt is not being triggered, or if the port output is just not firing (an LED?). Does the interrupt signal stay low long enough to trigger? Might edge detection be more appropriate (you said state change)?

My suspicion is setting up the interrupt, but my mind is racing with possibilities; really need to see some code. The signal's modulation characteristics would be helpful too.

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jeffjacques wrote:
Hi monarch,

That's a fair amount of code to ask for an example about.

Ok, you asked for it :D

.include "m169def.inc"

.org 0x00           ; start IRQ-Table
	jmp RESET ; Reset Handler
	jmp EXT_INT0 ; IRQ0 Handler
	jmp PCINTV0 ; PCINT0 Handler
	jmp PCINTV1 ; PCINT0 Handler
	jmp TIM2_COMP ; Timer2 Compare Handler
	jmp TIM2_OVF ; Timer2 Overflow Handler
	jmp TIM1_CAPT ; Timer1 Capture Handler
	jmp TIM1_COMPA ; Timer1 CompareA Handler
	jmp TIM1_COMPB ; Timer1 CompareB Handler
	jmp TIM1_OVF ; Timer1 Overflow Handler
	jmp TIM0_COMP ; Timer0 Compare Handler
	jmp TIM0_OVF ; Timer0 Overflow Handler
	jmp SPI_STC ; SPI Transfer Complete Handler
	jmp USART_RXC ; USART RX Complete Handler
	jmp USART_DRE ; USART,UDR Empty Handler
	jmp USART_TXC ; USART TX Complete Handler
	jmp USI_STRT ; USI Start Condition Handler
	jmp USI_OVFL ; USI Overflow Handler
	jmp ANA_COMP ; Analog Comparator Handler
	jmp ADC ; ADC Conversion Complete Handler
	jmp EE_RDY ; EEPROM Ready Handler
	jmp SPM_RDY ; SPM Ready Handler
	jmp LCD_SOF ; LCD Start of Frame Handler
	

RESET:

	ldi r16, high(RAMEND)	; Main program start
	out SPH,r16 			; Set Stack Pointer to top of RAM
	ldi r16, low(RAMEND)
	out SPL,r16

	ldi r16,1
	sts EICRA,r16	; any logical change IRQ
	sei ; Enable interrupts

	ldi r16,1
	sts EIMSK,r16	; enable INT0

	sbi EIFR,INTF0       ; clear interruptflag
	
	
	ldi r16,1   		; 1,2,4,8,16,32,64,128
	out DDRB,r16	; PortB direction

	ldi r16,0
	out DDRD,r16	; all portd pins are input
	ldi r16,2
	out PORTD,r16	; turn on internal pullups on PIN 2


hang:
	rjmp hang	


EXT_INT0:
	sbi PINB,0

TIM0_COMP: ; Timer0 Compare Handler
TIM1_OVF: ; Timer1 Overflow Handler
PCINTV0: ; PCINT0 Handler
PCINTV1: ; PCINT0 Handler
TIM2_COMP: ; Timer2 Compare Handler
TIM2_OVF: ; Timer2 Overflow Handler
TIM1_CAPT: ; Timer1 Capture Handler
TIM1_COMPA: ; Timer1 CompareA Handler
TIM1_COMPB: ; Timer1 CompareB Handler
TIM0_OVF: ; Timer0 Overflow Handler
SPI_STC: ; SPI Transfer Complete Handler
USART_RXC: ; USART RX Complete Handler
USART_DRE: ; USART,UDR Empty Handler
USART_TXC: ; USART TX Complete Handler
USI_STRT: ; USI Start Condition Handler
USI_OVFL: ; USI Overflow Handler
ANA_COMP: ; Analog Comparator Handler
ADC: ; ADC Conversion Complete Handler
EE_RDY: ; EEPROM Ready Handler
SPM_RDY: ; SPM Ready Handler
LCD_SOF: ; LCD Start of Frame Handler


	reti

Quote:

Your basic description sounds like you're pretty much there, but the sequence of things is everything. I'm not sure if the interrupt is not being triggered, or if the port output is just not firing (an LED?). Does the interrupt signal stay low long enough to trigger?

I already checked if the SBI PORTB,0 is working. If I insert a SBI PORTB,0 just before the dead loop, the LED is stays dark at the start of the code. If I remove it, its lit again.

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SteveN wrote:
Hi,

Hi SteveN,

thanks again for your time to give me my daily kick ;)

Quote:

Change this STS to an OUT:

sts EIMSK,r16   ; enable INT0 

This OUT/STS-Thing starts bugging me. :?

Quote:

Let me see if I can explain why.

Ok now, lets see if I got it straight.
Basicly STS and OUT do the same, except OUT is somehow optimised for IO-Operation and does its adressing with an offset of 0x20. So whenever I use a register that is listed with an alternative Adress (its STS-Adress), I use OUT instead of STS or I start writing my own definition-File so I can Adress every Register with STS (j/k ;) ).

I suppose sbi is also optimised for IO-Operations ;)

Okey, Im gonna check it out later....

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SteveN wrote:
Hi,

Wellll....actually....SBI/CBI/SBIS/SBIC only work on the lower half of the I/O registers. This does get kind of maddening ! It would be soooo nice if IN/OUT and SBI/CBI/SBIS/SBIC worked on the ENTIRE I/O space. It would make an already Extremely cool micro even cooler.

I think this is why they call it a RISC-Controler. Other microcrontrollers have more complex like the 80c31/51-family. e.g. "djnz rx,mark" (decrements Register Rx and jumps to "mark" if Register Rx is not zero) is way much more complex but they usaly have longer Systemcycles. The original-Intel 80c31 needed 12 Clocks per Systemcycle. Many Instructioncodes needed more than 2 or 3 Systemcycles. (DIV was the one with the longes executiontime of 7 or 10 Cycles, as far as I remember)

Quote:

I apologize if I made it overly simplistic.

No, your post was very helpful. The exact amount of kick I needed ;)

Regarts,
Niels