AT86 RF231 SLEEP to TRX_OFF transition

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I'm reading the software programming model (swpm) and the datasheet (ds) of RF231 802.15.4 transceiver.
They report a tTR2 time to change the radio state from SLEEP to TRX_OFF.
On the swpm they assert this time to be 240us (typ.), whereas on the ds they tell it to be 380us.
This time is affected by the internal TRIM capacitor that can be adjusted through sub-register SR_XTAL_TRIM. I set the subregister value to 0 equivalent to using internal C_TRIM of 0pF. This value gives me the shortest timings.
My crystal Load Capacitance is within the datasheet requested values (8 to 14pF) and the C_X capacitors attached to the crystal edges are respectively 10pF and 12pF. With this setup, the radio still requires around 1.5ms to reach the TRX_OFF state, which is several times the ds tTR2 reported value.

Can anyone confirm the 380us value for tTR2?

Thanks in advance
R

Last Edited: Fri. Oct 16, 2015 - 02:17 PM
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The Raven RF230 wake time seems about 50% greater than the datasheet value. You can graph wake time vs XTAL_TRIM using the code in www.avrfreaks.net/index.php?name...

Extrapolating that to the nominal wake time gives an estimate for the actual board capacitance. The ATMega128RFA1 has a wake interrupt that eliminates the need for any excessive software delay.

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> This time is affected by the internal TRIM capacitor that can be
> adjusted through sub-register SR_XTAL_TRIM. I set the subregister
> value to 0 equivalent to using internal C_TRIM of 0pF. This value
> gives me the shortest timings.

This is merely a side-effect only. The idea is that you could use
SR_XTAL_TRIM to fine-tune the crystal frequency to the exact value.

> With this setup, the radio still requires around 1.5ms to reach the
> TRX_OFF state, which is several times the ds tTR2 reported value.

The time to reach TRX_OFF depends from several factors. It consists
of two different processes that each take their time. The first step
is to power-up the digital voltage regulator. The time required for
this depends on the bypass capacitor used (pin DVDD), on the power
supply level, and somewhat on the dynamic source resistance of your
power supply. Once the voltage regulator is powered up, the crystal
oscillator can start up. The time for this primarily depends on the
crystal itself, namely on the ESR (effective series resistance) of the
crystal. The higher the ESR, the longer it takes to start up. Once
the crystal oscillator started generating clock cycles, a number of
cycles is being awaited until it is assumed to be stable
(glitch-free), and that's the point when it reaches TRX_OFF state.

In general, crystal oscillators are notoriously slow to start up. A
ceramics resonator would be much faster, but its accuracy is not
guaranteed to match the requirements for a successful IEEE 802.15.4
communication, and at the corner channels (11 and 26), you might risk
to emit energy outside the limits of the 2400 ... 2483.5 MHz band.

So, to get a fast startup from sleep, use small bypass capacitors on
DVDD, and use a crystal with a small series resistance. As a rule of
thumb, the larger the physical dimensions of the crystal are (relative
to its resonance frequency), the smaller the ESR is.

1.5 ms appears to be a fairly large figure though. How do you
determine TRX_OFF has been reached? Try enabling the "awake"
interrupt, and measure the time from the falling edge of SLP_TR to the
rising edge of the IRQ line using an oscilloscope or logic analyzer.

Jörg Wunsch

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