5v to 3v3 interface thoughts...

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This is the tale of a (now solved) subtle bug in a 5v to 3v3 level converter; it might help someone with a similar issue. In this case I was talking to some Ramtron FRAM.

Recall that for my design work I need to use minimum power, and I need to run at temperatures in excess of 150C. The first point implies that, for example, resistive dividers are not a permissible way of making the 5-3.3 conversion, and the second means that without six hundred hours of testing, I can only use components we've already used and know work on the tool.

I need to drive four lines: three from the five volt side, and one from the 3v3 side; it's being bit-banged from a pic.

The 3v3 to 5v side is easy; the standard BSN20 fet with the gate pulled up to the 3v3 rail and 4k7 on either side of it to the appropriate rail. This works well (and actually, I can probably remove the pull-up on the 3v3 side since its a totem-pole output on the driver). The other way around isn't so neat...

Thought one: diodes pointing to the 5v side, with pullups (3k3) on the 3v3 side. Unfortunately, they took the ground to only about 0.85v - a combination of the 220 ohm safety resistors on the pic's inputs and the band-gap voltage. Also, he input signal spiked up to 5v for perhaps a hundred ns before dropping to 3v3... and the memory check failed approximately 50% of the time. Damn.

Thought two: schottkys. Better; the zero is now down to under 250mV but the rise time on the 3v3 side is appalling; about a microsecond. Changed the pullups to 1k5 but it's still a half microsecond rise time. Plus, schottkys are leaky at high temperature. Nonetheless, let's try it: nah. Getting memory read or write errors about one in ten thousand or so... too many.

Thought three: the FET approach is bidirectional... yep, it's bidirectional but it's still got a slow rise time on the 3v3 side (because the fet is actually turning off and relying on the pullup). It's better than the schottky, but not by much; the rise time is about 400ns. Errors are now down to about one in a million - still not good enough.

Thought four: buffer the signal. It's actually the clock signal to the chips that's the issue. The steering logic is fine with its slow rise time, but the FRAM isn't; it was missing the clock every now and then, and with an SPI interface that means either that the command/address doesn't get through, or that you read or write offset from the start of the byte. This appears to work; I managed about two million cycles of memory test yesterday afternoon, at temperature, without error. (I know the chips are capable of at least two hundred million cycles from previous testing).

I need to decide today whether to go for this design, or whether to start again: I've located a 74LCX series chip that's rated to 125 and will probably work at 150 (needs testing, though) and which has 5v tolerant inputs. Alternatively, if I can persuade the boss, use 3v3 throughout this block... that moves the level conversion issues to his bit!

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Quote:
I need to run at temperatures in excess of 150C....it's being bit-banged from a pic.
Hmmm I have been told that hell runs a lot hotter than 150C, not that I care as I won't be visiting there anyway. :lol:

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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There are 5V FRAMs around.

I would also be concerned about retention of FRAMs at 150 deg.

JW

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Not in the capacities we need, Wek.

We've tested for the retention we need.

Boss says no to 3v3 throughout, so time to start testing the 74lcx244 from ST.

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barnacle wrote:
We've tested for the retention we need.
Hummmm.
barnacle wrote:
Boss says no to 3v3 throughout, so time to start testing the 74lcx244 from ST.
Some (most?) NXP level shifters appear to be specified for +125°C, too...?

JW

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Check out also 74LCX245, as it has a bit more convenient layout. And since you don't need 8 lines, can you consider something smaller like 74LCX125 too?

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There are many options for the transistors.
George.

edit: sorry, T1A, drain and source should be swapped.

Attachment(s): 

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Are the 3v3 inputs BJT or MOSFET? If MOSFET, then isn't it likely that a resistor on the input is all the conversion you need? Why would that be particularly inefficient, given the very small gate capacitance of a typical chip buffer FET?
I'm probably missing something totally obvious, because I don't work in this kind of area, but I'd be curious to know for learning's sake!

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The transistors are MOSFET type. The resistor is needed because otherwise it would create a short circuit on the 3.3V when the input is in between GND and 5V. The resistor will limit this current for the very short time it would happen.

George.

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angely, I wasn't commenting on your converter schematic, but the original requirements:

Quote:
resistive dividers are not a permissible way of making the 5-3.3 conversion

I'm not suggesting a resistive divider, but instead just a resistor (5k? 20k?) from the 5.0V output straight into the 3.3V input. Although this would theoretically pull the voltage all the way up to 5V, with the appropriate high resistance, many devices do fine anyway. (Don't know about FRAMs at all -- maybe that's one of the reasons this is not an acceptable solution)

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Ok, than to your question, even if the input protection diodes will do the job to protect the input against over voltage, there are two things that are not acceptable I think:
One would be a waste of energy on the resistor when at 5V and second, 20k will not give a good output waveform at high frequencies.
George.

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barnacle wrote:
This is the tale of a (now solved) subtle bug in a 5v to 3v3 level converter; it might help someone with a similar issue. In this case I was talking to some Ramtron FRAM.

Recall that for my design work I need to use minimum power, and I need to run at temperatures in excess of 150C. The first point implies that, for example, resistive dividers are not a permissible way of making the 5-3.3 conversion, and the second means that without six hundred hours of testing, I can only use components we've already used and know work on the tool.

I need to drive four lines: three from the five volt side, and one from the 3v3 side; it's being bit-banged from a pic.

The 3v3 to 5v side is easy; the standard BSN20 fet with the gate pulled up to the 3v3 rail and 4k7 on either side of it to the appropriate rail. This works well (and actually, I can probably remove the pull-up on the 3v3 side since its a totem-pole output on the driver). The other way around isn't so neat...

Thought one: diodes pointing to the 5v side, with pullups (3k3) on the 3v3 side. Unfortunately, they took the ground to only about 0.85v - a combination of the 220 ohm safety resistors on the pic's inputs and the band-gap voltage. Also, he input signal spiked up to 5v for perhaps a hundred ns before dropping to 3v3... and the memory check failed approximately 50% of the time. Damn.

Thought two: schottkys. Better; the zero is now down to under 250mV but the rise time on the 3v3 side is appalling; about a microsecond. Changed the pullups to 1k5 but it's still a half microsecond rise time. Plus, schottkys are leaky at high temperature. Nonetheless, let's try it: nah. Getting memory read or write errors about one in ten thousand or so... too many.

Thought three: the FET approach is bidirectional... yep, it's bidirectional but it's still got a slow rise time on the 3v3 side (because the fet is actually turning off and relying on the pullup). It's better than the schottky, but not by much; the rise time is about 400ns. Errors are now down to about one in a million - still not good enough.

Thought four: buffer the signal. It's actually the clock signal to the chips that's the issue. The steering logic is fine with its slow rise time, but the FRAM isn't; it was missing the clock every now and then, and with an SPI interface that means either that the command/address doesn't get through, or that you read or write offset from the start of the byte. This appears to work; I managed about two million cycles of memory test yesterday afternoon, at temperature, without error. (I know the chips are capable of at least two hundred million cycles from previous testing).

I need to decide today whether to go for this design, or whether to start again: I've located a 74LCX series chip that's rated to 125 and will probably work at 150 (needs testing, though) and which has 5v tolerant inputs. Alternatively, if I can persuade the boss, use 3v3 throughout this block... that moves the level conversion issues to his bit!


It happens that I am to do some SD card (3.3V required) experiments on 5V AVR. On the web there are many half baked solutions for the voltage level conversions.
But all SD card experiments on the web show that in the end everything leads to voltage level translators.
I am not sure about your temperature requirements, but otherwise these seem to be usefull and available in single quantities today:

TI: TXB0104
NXP: NVT2004
AD: ADG3304

Read more about it here: http://www.shop-en.display3000.com/important-add-ons/development-pcbs/sdcard_module.html

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Wow, cool link.

I can't believe the simple resistive divider had such a slow rise time! There must be a lot more capacitance on the output lines than I expected.

JC

Edit:
I recall using a simple resistive divider and two-transistor interface, shown Here .

Now I'm afraid to open the box and scope the resistive lines!

JC

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Sorry, been out of touch.

The reason that resistive dividers can't be used is simply power dissipation, as angelu pointed out: normal state is line high, so there would be an effectively permanent current drain through the resistors. When you're building circuits that have to run on fractions on a milliamp, you don't want to waste power. We are *paranoid* about power saving, both from the point of view of battery life and from local heat generation.

The charge time of the input is also an issue, of course; that's the reason the original converters wouldn't work: the memory wants a better than 50ns rise time, and the best I got with the various active and passive variants was 400ns. The significant line is the serial clock; with a serial interface it gets kind of confusing if a clock or two doesn't get there. And it turns out that while it doesn't care most of the time about that slow rise time, one time in a few thousand, it does...

I have some of the NXP 5v tolerant chips arriving tomorrow to play with.

For information: I couldn't make sdMicro cards last longer than a hundred hours at 150C... around then, even unpowered, they ate their filesystem. I suspect it doesn't help that there's a processor in there along with the memory slab.

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Again, I'm not suggesting a resistive divider; simply a current limiting resistor to prevent the target device from frying when you put 5V straight into it.

There is not any power dissipation here, because if the input is CMOS, then there is no current flowing during the "normally high" state. As you switch it, there is some loss in the resistor, but that power will be lost no matter what -- you have to fill or empty the gate charge of the input. The resistor just varies how quickly that happens.

If the input device doesn't like even a milliamp in at 5V, then a 5k resistor actually won't work -- but if your device is 5V-with-low-current tolerant, it's a
very simple solution!

If you drive this at dozens or even hundreds of megahertz, forget I said anything -- I realize that 5k resistors will make rise times too slow for that.

So, those are the two reasons I can think of: Too slow, or not-5V-tolerant-no-matter-what.

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If you feed a 3V3 input with 5V current will flow, all the time, through the protection diode from the input to the 3V3 rail.

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Precisely. Most devices are specified with a maximum input voltage of no more than 0.3v or so above Vcc to avoid that. Which is why you need a divider if you do it that way...

The other quick and dirty way is to use a pull-up resistor to the lower voltage rail, and a diode to the 5v output. When the output is driven low, the diode conducts and the input drops to ground (plus the bias drop of the diode, which may be significant) but the rise time is again set by the value of the resistor and the capacitance of the gate input and the diode. (And any track, of course.)

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I have about similar case and maybe Barnacle has already solved it. My car ecu operates at 5V memory used is 29F800, I should change it to 32 M (or 2*16M, 4*8M takes too much space), 32M with 5V, SO44 package, 8/16 bit output is not availabe, 3.3V it is but I need some level shifter from 5 to 3.3V to 5 V (for 16 bit data lines). Any good solutions ?
More memory is more power :)

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You could try the the 74LVC4245. Dual-supply translating version of the 74..245.

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Or the 74lcx16254 which is bidirectional, 2*8 bit, and 5v tolerant.

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29F160D is 16M, 5V 8/16 bit, TSOP48 package. I it is maybe easier to make adapter SO44 -> 2*TSOP48 than adapter with level shifter.