In the *.h file for the Xmega32A4 the last vectored is #define'd as #93 . For the 'A4U, its *.h file has the same vectors up to that number also, then its last two vectors are #125 and #126 ( USB related ) . Why wouldn't they use numbers of #94 - #95 ?
Edit: Maybe it's to have room future devices... ? I just checked the '256A3 and it has a jump too from #93 to #104 ( so all the *.h files probably have the jump ) .
Edit: Maybe it's to have room future devices... ?
It's a great strategy as it means that "porting" from one device to another is now as simple as setting the build target to the new model and recompiling - no more renaming registers/bits/vectors/etc.
BTW:
C:\Program Files\Atmel\AVR Studio 5.1\extensions\Atmel\AVRGCC\3.3.1\AVRToolchain\avr\include\avr>grep _VECTORS_SIZE iox* .h iox128a1.h:#define _VECTORS_SIZE (125 * _VECTOR_SIZE) iox128a1u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox128a3.h:#define _VECTORS_SIZE (122 * _VECTOR_SIZE) iox128a3u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox128a4u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox128b1.h:#define _VECTORS_SIZE (81 * _VECTOR_SIZE) iox128b3.h:#define _VECTORS_SIZE (54 * _VECTOR_SIZE) iox128d3.h:#define _VECTORS_SIZE (114 * _VECTOR_SIZE) iox128d4.h:#define _VECTORS_SIZE (91 * _VECTOR_SIZE) iox16a4.h:#define _VECTORS_SIZE (94 * _VECTOR_SIZE) iox16a4u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox16d4.h:#define _VECTORS_SIZE (91 * _VECTOR_SIZE) iox192a3.h:#define _VECTORS_SIZE (122 * _VECTOR_SIZE) iox192a3u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox192d3.h:#define _VECTORS_SIZE (114 * _VECTOR_SIZE) iox256a3.h:#define _VECTORS_SIZE (122 * _VECTOR_SIZE) iox256a3b.h:#define _VECTORS_SIZE (122 * _VECTOR_SIZE) iox256a3bu.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox256a3u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox256d3.h:#define _VECTORS_SIZE (114 * _VECTOR_SIZE) iox32a4.h:#define _VECTORS_SIZE (94 * _VECTOR_SIZE) iox32a4u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox32d4.h:#define _VECTORS_SIZE (91 * _VECTOR_SIZE) iox64a1.h:#define _VECTORS_SIZE (125 * _VECTOR_SIZE) iox64a1u.h:#define _VECTORS_SIZE (128 * _VECTOR_SIZE) iox64a3.h:#define _VECTORS_SIZE (122 * _VECTOR_SIZE) iox64a3u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox64a4u.h:#define _VECTORS_SIZE (127 * _VECTOR_SIZE) iox64b1.h:#define _VECTORS_SIZE (81 * _VECTOR_SIZE) iox64b3.h:#define _VECTORS_SIZE (54 * _VECTOR_SIZE) iox64d3.h:#define _VECTORS_SIZE (114 * _VECTOR_SIZE) iox64d4.h:#define _VECTORS_SIZE (91 * _VECTOR_SIZE)
Thanks that makes sense , the chip has its sweet spots and that's one of the biggest ! I can't think of anybody else's MCU design that has such a structure .
Also, the Manual A for the Xmega32A4U says there's an AWEX_D and the "Preliminary" 'sheet for these 'A4Us says its AWEX_E !! The *.h file doesn't have a #define for either !? What are you guys 'freaky thoughts on THAT one ?!
The word from Atmel is that there's only ONE AWEX for that MCU even though device-specific manual indicates there are 2 .
