I've been using timer3 with the MCU clock for interrupts to run the Raven radio duty cycle. With a 1024 prescaler at 8MHz that gives about the right time precision of 128 microseconds, at first sight an attractive number but turns out to be 7812 counts per second, and that requires division to calculate the expected turnon time of another radio.
It would be nice if the counts per second were a power of two, as then the calculations could be done by masking and shifting. It would also give more accuracy after an MCU sleep. That is based on a timer2 wake from the 32768 Hz watch crystal which will jitter the next receive window.
Everything would be a lot simpler if F_CPU were a power of two! 4 MHz would not be fast enough to unload the radio frames, but OSCCAL can easily drive it to 8388608.
It would take a bit of time to modify things to work with a new F_CPU define, so before I try it can anyone advise how stable such 5% overclocking would be?