Phase shifter circuit

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lcruz007
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Posted by lcruz007: Fri. Nov 25, 2011 - 09:31 PM
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Hi,

An input non-periodical signal starts when the circuit is powered on, BUT after some few milliseconds I want the output signal to be shifted in its phase at least 2PI (one full cycle), or have a sort of timer that outputs the signal a few milliseconds after.

How can I achieve this? Is there any type of a time-delay circuit with op-amps? I saw one but it only shifted the wave 180 degrees, it doesn't work for me, as I have analyze a full cycle first and then manipulate the shifted signal.

Something like this (e.g):

Signal [channel 1 to oscilloscope] -> Delay[500ms] -> The exact signal [channel 2 of osccilloscope], but starting 500ms after the circuit was powered on.

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Brian Fairchild
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Posted by Brian Fairchild: Fri. Nov 25, 2011 - 09:34 PM
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Are you after a phase shift or a time delay?

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lcruz007
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Posted by lcruz007: Fri. Nov 25, 2011 - 09:40 PM
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Brian Fairchild wrote:
Are you after a phase shift or a time delay?

Well a time delay would work just fine as long as the exact signal comes out but after that delay.

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KitCarlson
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Posted by KitCarlson: Fri. Nov 25, 2011 - 09:52 PM
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What signal? Analog or digital, what is the maximum voltage.

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lcruz007
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Posted by lcruz007: Fri. Nov 25, 2011 - 09:54 PM
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KitCarlson wrote:
What signal? Analog or digital, what is the maximum voltage.

It's an analogue signal, 5V would be its peak (max point).

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DocJC
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Posted by DocJC: Fri. Nov 25, 2011 - 11:43 PM
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Also need to know the frequency spectrum of the input signal, and how accurately you need the output signal to be.

One approach would be to use the ADC to sample the signal, store the samples in a ring buffer, and dump them out a DAC.

The frequency characteristics of the input signal influence the ADC selection.

The accruacy of the output influences the ADC and DAC selection.

The sampling rate needed and the time delay determine how much memory you need to store the samples.

An Xmega Xplain board with its higher speed and resolution ADC than the Megas, and its built-in DAC, and the board's external memories might be a starting place.

Years ago there were switched capacitor time delay chips, but I've not worked with one of those in a long tme.

JC

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ka7ehk
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Posted by ka7ehk: Sat. Nov 26, 2011 - 01:23 AM
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What is the frequency range of the input signal?

Jim

 

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lcruz007
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Posted by lcruz007: Sat. Nov 26, 2011 - 01:38 AM
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Hi,

Thanks for your replies. I am working within the range of 1Hz-1KHz. The only type of DAC I have used before is a PWM of an atmega, which wouldn't work for this application as the output signal would be digital. Is there any other solution I can find for an analogue DAC?

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ka7ehk
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Posted by ka7ehk: Sat. Nov 26, 2011 - 01:45 AM
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How closely do the successive edges of the output have to follow those of the input?

There are many DACs. Depends a lot on what you need.

If you were to sample the input at some rate, and simply delay, with what would effectively be a shift register and output on a port pin, you would have what you need. You could probably sample at 100KHz (with a 16MHz clock, which makes 160 instructions per sample) which would give you a 10us uncertainty between the input and the output. The delay would be limited only by the amount of memory you have. At 10us sample rate and 500ms delay, you would need 500ms/10us = 50,000 "memory locations". The simple way would be 1 byte per bit, requiring 50K of SRAM. But, if you packed 8 bits into one byte, you would only need 6.25K of SRAM. No DAC nor ADC needed.

What you need (and would be making) is a digital delay line. There is no justification for analog because you must discretely sample. You have to do this because there is no readily available analog delay line with that much delay and that also has the bandwidth to reconstruct a 1KHz square wave.

Jim

 

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