How to remove DC after an op amp?

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I have a differential amplifier with a gain of 500.
The input mV signal goes out as ~5V. What I am really interested though is the rapid voltage differences, that is the amplitude change in the wave (Something that has a slope), but not the DC produced by the voltage difference: (V2-V1). How do I remove that DC of 5V, and have it centered to around 2.5V for instance, or maybe even to zero volts (I am using dual polarity supply in the op amp)?

Thanks

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Capacitor

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Voltage divider, equal resistors, R & R, between Vcc and ground. That makes a 2.5V bias level. Then, couple amplifier output to bias divider with a cap, C. The apparent resistance looking into the divider is R/2. You can set the frequency response with the value of C. The 3db corner frequency is 1/(2*PI*(R/2)*C) = 1/(PI*R*C). in Hz.

Jim

 

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Xantor and Jim both gave you a good answer, but sometimes a picture is worth a 1000 words.

Your diff amp feeds the input to this next stage, then on to whatever else you have. I copy / pasted this from an old project, the exact values are up to you. The output R & D can be omitted.

JC

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Yo Doc... wont R23 load down the voltage divider? Load is supposed to be 10x the divider as I recall. Make the divider 10K and the input R 100K and the feedback R 1M?

Imagecraft compiler user

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Shouldn't R24 be 10.7k?

Tom Pappano
Tulsa, Oklahoma

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2 cents:
@ bobgardner - input impedance is not straight equal to R23; it's much higher, thus will not load the divider;
@ tpappano - it's layout requirement having equal resistors in series for both inputs IIRC (circuit will work with any value from 0 to high but reasonable, though).

respek!

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Quote:
2 cents:
@ bobgardner - input impedance is not straight equal to R23; it's much higher, thus will not load the divider;

The *AC impedance seen by Vin* is 12.1k || 100k || 1meg || 1meg, in series with 10uf or 10.6k in series with 10uf. The *DC input resistance of just the amplifier circuit* (at the right hand terminal of the 10uf cap) is 10.6k (Thevenin's equivalent of the resistor network)

Quote:
@ tpappano - it's layout requirement having equal resistors in series for both inputs IIRC (circuit will work with any value from 0 to high but reasonable, though).

Not quite. The op amp + and - inputs (ideally) need to see the same resistances to minimize DC output shift due to the voltages produced at the inputs by the input bias currents. So, in precision circuits where a voltage divider on the - input is used to establish gain, a resistor of equivalent resistance is placed at the + input. The circuit "would work" with a wide range of values for R24, but there would be a worse output offset with an inappropriate value.

edited some sleepy errors...

Tom Pappano
Tulsa, Oklahoma

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Yes true, input impedance do is 10,6K; overlooked inverting layout. Bobgardner and You are right.
Agree with second statement, too -
Sorry for misleading. Insomnia, indeed.

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tpappano wrote:
Quote:

The *AC impedance seen by Vin* is 12.1k || 100k || 1meg || 1meg, in series with 10uf or 10.6k in series with 10uf. The *DC input resistance of just the amplifier circuit* (at the right hand terminal of the 10uf cap) is 10.6k (Thevenin's equivalent of the resistor network)

This is absolutely true if we analyze this schematic with the op amp taken out. If we don't forget about it, the inverting input of the op amp makes a virtual ground in this case AFAIK. That makes 12.1k || 1meg || 1meg = 11.8k, in series with 10uf. R21 doesn't matter.

Besides that, i would say that Doc's schematic has two big errors. One, as Bob already said, is the wrong chosen divider R16/R17 (should be 1k, not 1 meg if R23 is 12.1K)
The second is the misplaced divider R16/R17. It should be connected to the non inverting input where 1 meg for R16/R17 is just fine, but i would add a capacitor for better AC grounding.

All in one, the schematic above will not work with 0-5V power supply. It will just make a steady 0V at output.

Dor

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Busted...

Opps. I noted it was a cut and paste, but I guess I should have looked closer when I spliced it together.
There was originally a voltage follower after the dc blocker. The large C and R values were to hit a very low cut off frequency.
The resistor values jump in numbering as there was originally some other suff in the middle, a controlled attenuator, etc.

As drawn, poor choice for values.

R24 could get tweaked, but I'm not producing lots of them, and at this stage it was all large signal. Having R24 close to R23 makes a big difference, as opposed to connecting the + input directly to ground. The mismatch is trivial in this case.

The (+/- 8V) added under the op amp was to indicate its power supply, not unipolar. The original power leads being drawn on another op amp in the package.

Enough said. Should have left it alone with Jim's verbal description of the circuit. Or eliminated the values when I cut and pasted stuff.

Oh well.

JC

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I don't think I've ever debugged a circuit that wound up having the same partslist as the initial schematic.

Imagecraft compiler user

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OK, since I totally botched the cut and paste above, here is Version II, so as not to leave lcruz007 hanging...

Given you have a bi-polar power supply, as stated, run your op-amp on V+ and V-.
The resistor divider goes from V+ to Gnd for a 2.5 V DC bias point.
The lower end of the resistor divider could go to V- if you wanted a 0 V DC bias point, but then there are also other ways of doing that.
When you calculate the R in the filter cutoff frequency note that R1 and R2 are in parallel as far as the filter is concerned.
With the high input impedance of the voltage follower shown you won't have to worry about its impact on the filter.
The DC Blocker is actually a High Pass Filter, i.e. if passes high frequencies, blocks low frequencies, of which DC is the "lowest", (i.e. 0 Hz).
You can select the "R" and C values to set the cut off frequncy as low as you want to go.

You did not mention what you are doing with the output, but note that you don't want to feed it into an ATMega or ATTiny ADC. They are for positive input voltages only, and with a bi-polar power supply the op amp's output could swing negative.

Sorry to have lead you astray earlier.

JC

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Quote:
I don't think I've ever debugged a circuit that wound up having the same partslist as the initial schematic.

Bob, isn't that the truth!

JC