Please give your opinion on my circuit/PCB Layout

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Hi folks,

I've now spent a lot of time designing this circuit and I hope that it is at least close to finished. Don't get fooled by my lame logo on there, this is a personal project for my parents cabin :)

I have two voltage regulators, one for driving two servos which draws a bit of current, and one LDO for driving the mega32 and the sensors for increased accuracy.

I have never gotten manufactured professionally a board like this, so I need your opinions. As this is a private project I would really like to get it right the first time, since getting these boards made are pretty expensive.

If there is info I should have given here which I've forgot let me know and I'll provide it!

I've tried to attach schematics and gerber files.

All feedback will be MUCH appreciated :)

Moderator: If this is the wrong forum then I apologize, feel free to move it.

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Some notes:
- your power tracks are too thin
- for the through hole components is a good idea to fatten up the tracks when they run into the pad, this will make where the track joins the pad more strong
- read the avr appnote on oscillator layout
http://www.atmel.com/dyn/resourc...
- perhaps remove the ground plane from under the to220 heatsink as this might short
- jp6 might be a touch close to the mounting hole
- r4 and r7 could be more nicely aligned
- ic3 and ic4 could do with a psu decoupling cap
- decouple and pullup your mcu reset line
- connectors at the bottom could be at a fixed pitch also
can you give a rough idea of what the project does? it looks like it connects to the outer world? - did u give any consideration to ESD type issues?

oddbudman

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Quote:
it looks like it connects to the outer world?

It has "snow" label on it. Is it a solar tracker?

Hope you have already built two working prototypes and this is the third, final version.

No RSTDISBL, no fun!

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My 2 cent and 2 minutes: nice design and component placement. Distance between components is optimized to be as small as possible seen from the MCU.

On the negative side: the trough hole vias may short to nearby traces, for example near the crystal/one of the caps. All traces have the same (small) width although that is no problem when currents are below 100mA or so.

Analog low noise design:

Ideally the traces should be as short as possible, you should have a full covering ground plane at one of the layers and the decoupling capacitors should be as close to the "VCC" pins of the IC's as possible. Never have a long trace to the GND of IC's or a decoupling capacitor.

Do not run traces (and thus currents) in a "loop" (making an area) on the board since it will act as a coil emitting magnetic fields. Try to keep the ground as a star point in the design.

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Hmm is there any capacitors above 10µF on the board?

It is necessary when powering the board from wall adapters and the like than have high ripple voltage.

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Quote:
wall adapters and the like than have high ripple voltage.
Unless of course they are regulated.
The pictures are HUGE so it's hard too see what's going on for me.

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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The USB connector is not wired correctly, at least according to the naming in schematic. Look at C+ and VBUS.

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There are many copper islands. Have you prototyped this yet? Sometimes they don't cause any issues, sometimes they act as RF beacons, usually somewhere in between. :)

Did you do a DRC with your fab house's specs? I can't be sure as I don't have a scale but some features seem very small.

Nice board, though!

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oddbudman wrote:
Some notes:
- your power tracks are too thin
- for the through hole components is a good idea to fatten up the tracks when they run into the pad, this will make where the track joins the pad more strong
- read the avr appnote on oscillator layout
http://www.atmel.com/dyn/resourc...
- perhaps remove the ground plane from under the to220 heatsink as this might short
- jp6 might be a touch close to the mounting hole
- r4 and r7 could be more nicely aligned
- ic3 and ic4 could do with a psu decoupling cap
- decouple and pullup your mcu reset line
- connectors at the bottom could be at a fixed pitch also
can you give a rough idea of what the project does? it looks like it connects to the outer world? - did u give any consideration to ESD type issues?

oddbudman

Thanks a lot people for your replies, I will need some time today to comprehend all comments and implement them. In the mean time I am happy to give an explanation of what the board will do:

This will be at a cabin, controlling two servos in X and Y direcection with a webcam mounted on it, as well as a power LED(LIGHT connector, only for activation signal, will be separately powered). Connection to to outer world is via the USB connector to a computer where I will have a C# program (still under development). The other sensors I will implement is temperature inside and outside (both PT100 element interfaces), snow depth (IR distance sensor), Light brightness (photoresistor), Motion detector and TEMP_ADJ is essentially just a IO signal that may go to a small circuit in the cabin living room controlling an oven to adjust temperature.

The 6-point connectors are just to connect the rest of the unused pins, just in case i want to test out solutions for a future new version.

I will try to make the changes you all have suggested, I think some of the suggestions are hard to implement tho - I'm not an Eagle guru to be honest.

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oddbudman wrote:
Some notes:
- your power tracks are too thin
- for the through hole components is a good idea to fatten up the tracks when they run into the pad, this will make where the track joins the pad more strong
- read the avr appnote on oscillator layout
http://www.atmel.com/dyn/resourc...
- perhaps remove the ground plane from under the to220 heatsink as this might short
- jp6 might be a touch close to the mounting hole
- r4 and r7 could be more nicely aligned
- ic3 and ic4 could do with a psu decoupling cap
- decouple and pullup your mcu reset line
- connectors at the bottom could be at a fixed pitch also
can you give a rough idea of what the project does? it looks like it connects to the outer world? - did u give any consideration to ESD type issues?

oddbudman

* I have made the VCC2 (which is the 5V from 7805 regulator for motors) to 16mil, the GND are connected to ground plane so that should be OK, right?

* Now I have made polygon planes for GND both on Upper and Bottom layer, is this better than having Upper layer = GND and Bottom layer = VCC?

* I looked at the Atmel appnote on oscillator, I have done changes so that should now be OK?

* The bottom mounting holes has been moved slightly more away from the JP6 connector.

* I have decoupled reset through a 100nF cap to ground, and added a 4k7 pull up resistor for RESET.

* R4 and R5 are now aligned.

* Ground plane removed from under the LM7805/heatsink TO220

* tracks have been fattened up at through hole pins, at least most of them where this was possible without causing DRC errors.

* IC3 and IC4 PSU pins are now decoupled with 100nF

I have not made any ESD considerations really... I should maybe add some transient filter, a zener to GND i.e?

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janeyolf wrote:
The USB connector is not wired correctly, at least according to the naming in schematic. Look at C+ and VBUS.

Are you sure? I'm not sure I follow you.

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rg2720 wrote:
janeyolf wrote:
The USB connector is not wired correctly, at least according to the naming in schematic. Look at C+ and VBUS.

Are you sure? I'm not sure I follow you.

Yes, I'm pretty sure :)

I assume that C+ is USBDP and VBUS is the USB 5V? You've got 5V connected to the FTDI USBDP pin and the USBDP port pin connected to the reset pull-up resistor.

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No additional comments on the updated version?

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Is that the regulator at the top of the layout? You may want to give it a better ground connection (thicker, direct trace).
Some vias are very close to IC pins or component pads. Unless they are buried ($$), this can lead to difficulties in soldering. Would be best to space them out such that 10mil+ of soldermask is between the pin/pad and via. The assembly house may have specifications on this.
Clearances still look quite tight. It is best to make features (trace width, minimum space between features) larger than the minimum pcb fab tolerances to increase yield.
There are a few spots where a trace runs right alongside a soldermask pullback area around vias, as well -- a bit more space here may save a headache.

I encourage differences in opinion, from OP or other ;)

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It would be a good idea to select a suitable supplier and base your design rules on their specification. You can then run a DRC and make sure that your board corresponds with their requirements. If your clearances are too tight you will probably get your board rejected, and will have to redesign it, anyway.

Leon Heller G1HSM

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I would make the power traces even wider. Double or triple what you have now. Servos draw a lot of current when moving.

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May be connect SD pin to GND?

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On the schematic:
- As pointed out above, the wiring to the USB connector in the schematic is wrong - the pin labeled "VBUS" is connected to USBDP on the '232 and the pin labeled "D+" goes to the voltage divider for ~reset
- You need three current-limiting resistors on LED4 instead of R14
- LED current limiting resistors look too large
- I would put a series resistor between the Atmel and SW1 so you are less likely to blow things up if you try driving PD7 as an output
- Is the reset pin on the ISP connector connected to anything?
- Vcc and ground symbols are free; adding a few more can help unclutter a schematic. Likewise, using named nets instead of wires can also help
- IC5 needs a 330nF cap on the input and a 100nF cap on the output to prevent oscillations
- If the 100uF caps (and any other caps) are polarized, use a polarized capacitor symbol
- Pin 6 on your LP2951M symbol should be called "VTAP", not "VTAB"
- Are you sure that your DC adapter has a center negative connector?
- The input of IC5 should come after the reverse-polarity protection diode
- The 7805 needs at least 7 volts to function; it won't work on 5V. Likewise, the LP2951 needs a 40 to 380mV headroom depending on load
- The serial port from the Atmega doesn't appear to be connected to the FT232

On the PCB:
- bypass caps need to be much closer to the pins that they are bypassing
- any polarized caps need a polarity indicator
- As mentioned before, power traces need to be wider, and the ground from the regulator needs to grow as well
- you may want to add mounting holes for the heatsink so it won't stress the regulator's leads
- There are many places where the silk screen is on top of vias
- try to have traces connect to pads at 90 degrees to avoid acid traps
- traces connecting to the processor pads should connect to the center of the pad; connecting down the side will likely violate spacing rules
- traces should bend at 45 degrees, not 90 degrees
- labeling the function of the various connector pins is a very good idea.

/mike

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n1ist wrote:
On the schematic:
- As pointed out above, the wiring to the USB connector in the schematic is wrong - the pin labeled "VBUS" is connected to USBDP on the '232 and the pin labeled "D+" goes to the voltage divider for ~reset
- You need three current-limiting resistors on LED4 instead of R14
- LED current limiting resistors look too large
- I would put a series resistor between the Atmel and SW1 so you are less likely to blow things up if you try driving PD7 as an output
- Is the reset pin on the ISP connector connected to anything?
- Vcc and ground symbols are free; adding a few more can help unclutter a schematic. Likewise, using named nets instead of wires can also help
- IC5 needs a 330nF cap on the input and a 100nF cap on the output to prevent oscillations
- If the 100uF caps (and any other caps) are polarized, use a polarized capacitor symbol
- Pin 6 on your LP2951M symbol should be called "VTAP", not "VTAB"
- Are you sure that your DC adapter has a center negative connector?
- The input of IC5 should come after the reverse-polarity protection diode
- The 7805 needs at least 7 volts to function; it won't work on 5V. Likewise, the LP2951 needs a 40 to 380mV headroom depending on load
- The serial port from the Atmega doesn't appear to be connected to the FT232

On the PCB:
- bypass caps need to be much closer to the pins that they are bypassing
- any polarized caps need a polarity indicator
- As mentioned before, power traces need to be wider, and the ground from the regulator needs to grow as well
- you may want to add mounting holes for the heatsink so it won't stress the regulator's leads
- There are many places where the silk screen is on top of vias
- try to have traces connect to pads at 90 degrees to avoid acid traps
- traces connecting to the processor pads should connect to the center of the pad; connecting down the side will likely violate spacing rules
- traces should bend at 45 degrees, not 90 degrees
- labeling the function of the various connector pins is a very good idea.

/mike

Thank you very much for your effort of looking through the circuit and giving your comments. Alltho I now have a fair amount of work to do to correct my circuit according to your comments. Manually routing these things takes ages, at least for me.

I will reply when I have done the corrections, but some minor replies to a couple comments:

"- LED current limiting resistors look too large ": The reason for such high values are that I dont want the current flowing through LEDs causing a voltage drop at the LDO linear regulator. I use this voltage as a voltage reference for measuring resistances of sensors.

"- Is the reset pin on the ISP connector connected to anything?": Yes it is, through a NET. I should have marked that in the schematic, I guess I will do that now. You can see in the PCB that it is wired.

"- The 7805 needs at least 7 volts to function; it won't work on 5V.": Again, didn't think of marking this in the schematic, but input power will be 12V (thats whats currently the plan at least).

"- The serial port from the Atmega doesn't appear to be connected to the FT232": Same as the RESET, these are connected through a NET, I thought this would make the schematic more "tidy".

Now, I have work to do!:)

Thanks again.

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Connecting with named nets does make the schematic neater, but you need to put the name on all of the places you find net, so someone reading the schematic can see where they go.

You have the DC input connector labeled "5 VDC" in the schematic; that's why I mentioned the regulator headroom issue.

The current-limiting resistors still seem a bit large, especially on the blue and green LEDs. With Voh (min) of 4.2v and 2.1v forward voltage for the green, you will only get 0.5mA; it may be enough for a high-efficiency LED.

/mike

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n1ist wrote:
On the schematic:
- As pointed out above, the wiring to the USB connector in the schematic is wrong - the pin labeled "VBUS" is connected to USBDP on the '232 and the pin labeled "D+" goes to the voltage divider for ~reset I have changed it now, should be correct.
- You need three current-limiting resistors on LED4 instead of R14
- LED current limiting resistors look too largeI might change them, but it has no effect on the PCB so Ive kept them for now

- I would put a series resistor between the Atmel and SW1 so you are less likely to blow things up if you try driving PD7 as an outputGood idea, Ive added a 10k in series.

- Is the reset pin on the ISP connector connected to anything?
- Vcc and ground symbols are free; adding a few more can help unclutter a schematic. Likewise, using named nets instead of wires can also help
I have tried to clean up some more in the schematic.

- IC5 needs a 330nF cap on the input and a 100nF cap on the output to prevent oscillationsI have a huge cap on the output, but I now added another on the input.

- If the 100uF caps (and any other caps) are polarized, use a polarized capacitor symbol
- Pin 6 on your LP2951M symbol should be called "VTAP", not "VTAB"Ive just used a standard part from the library, I didnt bother to change that spelling error:)

- Are you sure that your DC adapter has a center negative connector?No, I think it was wired wrong. I changed it, hope it looks better now.

- The input of IC5 should come after the reverse-polarity protection diodeCorrected that.

- The 7805 needs at least 7 volts to function; it won't work on 5V. Likewise, the LP2951 needs a 40 to 380mV headroom depending on load
- The serial port from the Atmega doesn't appear to be connected to the FT232

On the PCB:
- bypass caps need to be much closer to the pins that they are bypassing
- any polarized caps need a polarity indicator
- As mentioned before, power traces need to be wider, and the ground from the regulator needs to grow as well
- you may want to add mounting holes for the heatsink so it won't stress the regulator's leads
- There are many places where the silk screen is on top of vias
- try to have traces connect to pads at 90 degrees to avoid acid traps
- traces connecting to the processor pads should connect to the center of the pad; connecting down the side will likely violate spacing rules
- traces should bend at 45 degrees, not 90 degrees
- labeling the function of the various connector pins is a very good idea.

/mike

I have now manually rerouted this heap of garbage PCB grr, I'm getting sick of it :lol:

How do you think it looks now? Any better? Or just as horrid?

Let me know if I should add images of the gerbers again.

Thanks again for your help! :)

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Why is that long single track looping round the board at the top of the image?

You have some acute angles where tracks join. They should be avoided.

You have some funny angles on some tracks - use 90 or 45 degrees.

Some track corners aren't mitred.

Leon Heller G1HSM

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C4 is supposed to be a decoupling capacitor, and should be connected to GND, not VCCIO. VCCIO should be connected to VCC, and have it's own decoupling capacitor. Have a look at the datasheet for recommended decoupling.

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Now you know why it is called "artwork".

I would move c6 next to the 7805, so you won't need the long looping trace to the left, and it would be close enough to do some useful bypassing.

The VCC trace from the LP2951 still needs to be made wider, as it too is a power trace, and all of your chips run from it.

There are a number of places where rotating or moving a passive will clean up the routing a bit (ie, flip R9 end-for-end, move R10 to above R11 (R12 can move to the left of your logo), R1 and R2 next to C4)

I have redrawn the power supply section to make it clearer; there are a few changes in there to improve it.
/mike

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leon_heller wrote:
Why is that long single track looping round the board at the top of the image?
It is 5V coming from the 7805 to drive the servo motors. It is a different 5V than VCC (The standard VCC is coming from IC6).

You have some acute angles where tracks join. They should be avoided.
Hehe, it's really hard to avoid. To avoid 90 degrees it requires more space in order to take the turn in 2 steps rather than in one 90 degree. I'll try to make the traces nicer tho - if you guys think the rest looks OK ill spend more time on it.

You have some funny angles on some tracks - use 90 or 45 degrees.

Some track corners aren't mitred.

Thanks a lot for commenting.

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n1ist wrote:
Now you know why it is called "artwork".

I would move c6 next to the 7805, so you won't need the long looping trace to the left, and it would be close enough to do some useful bypassing.

The VCC trace from the LP2951 still needs to be made wider, as it too is a power trace, and all of your chips run from it.

There are a number of places where rotating or moving a passive will clean up the routing a bit (ie, flip R9 end-for-end, move R10 to above R11 (R12 can move to the left of your logo), R1 and R2 next to C4)

I have redrawn the power supply section to make it clearer; there are a few changes in there to improve it.
/mike

Awesome again, Mike. Thanks. Hehe, yes - it is indeed artwork! :lol:

Ive implemented all changes you suggested. After manually routed the board I now have 36 vias. In my original post in this thread there was 72 vias, after autorouting...

Some components are now going to get in the way of the 7805, but I am only going to attach a small heatsink. These servos will only be moved momentarily and seldom so I have no belief in them getting overheated.

What do you think of the PCB/Schematic as it is per now? :)

EDIT: Didnt see the other comment, now fixed this as well:

Quote:
C4 is supposed to be a decoupling capacitor, and should be connected to GND, not VCCIO. VCCIO should be connected to VCC, and have it's own decoupling capacitor. Have a look at the datasheet for recommended decoupling.

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You can rotate D2 to get it out of under the heatsink. I would also route D2 with bottom-side traces so the heatsink can't rub through the solder mask and short things out. D1's cathode doesn't look like it is connected to the right side of L1 on the board.

Have you actually chosen components? You have two different sizes of 100nF caps (and they aren't needed for voltage reasons), the 330nF cap looks a bit large, and the 100uF caps look way too small for either electolytics or ceramics at that voltage rating. Make sure you follow the data sheet's recommendations on capacitor type; some require tantalum or aluminum lytics for filters; on those, if you just use ceramics, they will oscillate. The MP2951 is certainly one of them.

You have a short on D+ and D- under the USB connector; try to run those traces as a differential pair (roughly the same length, with a constant spacing between them. Rotating IC2 and moving the LEDs over to the other side may make this better.

You will need three current limiting resistors for the RGB LED instead of R14.

The top layer ground pour is broken up to the point where it is almost useless, and some of the segments are not well connected to the bottom pour. I wonder whether it would be better to remove it and drop vias to the bottom ground pour where needed. For example, look at the return current path from C2 (one of the crystal's capacitor) back to the processor or between IC3's ground pin and C12, it's bypass capacitor. Yes, it will add vias, but most board houses don't charge by the via these days. Then see if you can minimize the back-side traces to keep from cutting the plane into sections.

/mike

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I think most of the top pours look OK, Mike. Some may require "stitching" (like C2), but I haven't looked at current volume.
I'm not sure how that short would have passed the DRC, though. Are you using an automated design rule checker?

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Quote:
I think most of the top pours look OK, Mike. Some may require "stitching" (like C2), but I haven't looked at current volume.
I'm not sure how that short would have passed the DRC, though. Are you using an automated design rule checker?

Current volume is low, other than the two servos the rest of the circuit should be well below 100mA.

Quote:
You can rotate D2 to get it out of under the heatsink. I would also route D2 with bottom-side traces so the heatsink can't rub through the solder mask and short things out. D1's cathode doesn't look like it is connected to the right side of L1 on the board.

I actually couldn't, I think it's due to my Eagle free version, I get an error saying that the Free Version of Eagle can't perform the requested command or something. I did however move both Diodes. I removed the two 100uF caps which gave me some spare area.

Regarding that short I must have just done a quick fix between my last DRC check and my post of the picture. Ive fixed that now. I also introduced some more vias to make the top GND plane more complete.

Quote:
Have you actually chosen components? You have two different sizes of 100nF caps (and they aren't needed for voltage reasons), the 330nF cap looks a bit large, and the 100uF caps look way too small for either electolytics or ceramics at that voltage rating. Make sure you follow the data sheet's recommendations on capacitor type; some require tantalum or aluminum lytics for filters; on those, if you just use ceramics, they will oscillate. The MP2951 is certainly one of them.

I did a quick search while creating the schematic for each part to ensure that they came in the package that I chose in the schematic. I didn't take the voltages in to consideration at that stage. As mentioned I removed both 100uF caps and only kept the caps that the 7805 and 2951 mentioned in their datasheets. I guess I will go for tantalum on the 2951 then, as the alu lytics are a bit big.

Are there still unnecessary caps on there? I don't mind getting rid of more of them :)

Quote:
You will need three current limiting resistors for the RGB LED instead of R14.

This one I'm not sure I understand. As long as only one of the LEDS are lit at a time then it should be allright? If I'm mistaken, please explain me why.

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Take a close look at your USB data signals. They are shorted together.

Regardless of that in all of the versions of the PCB you have these signals routed while not respecting the fact that they are a differential signal that should be routed close together. Instead you have one close to the connector, the other one is taking the high way around the connector. While not deadly, I would consider it more proper.

At a quick glance your cap placement seems not optimal in some places (see C8 - rotated 90 deg would serve better, or atleast make the track go from the pad and then using a 135 deg line connect onto the processor, instead of just bending it under the part - this gives you two advantages - space under the cap for another track, and a sligthly shorter path from path to device). Something similar should be said for your region around IC6.

Also, C4 should be placed on the path to the FT232, not sideways. It's a bypass cap.

You'd also might wanna check for part existence, such as C7 - I don't remember seeing a 10uF cap in a package that's smaller than a 1206.

L1 - seems one connection of it is totally disconnected. According to your schematic it should be connected. The same goes for diode D1.

As for R10 and R11 being 3.9k... you should really take a look at how you like the brightness of a LED at 0.6mA.

Take also a look at the region around the FT232 - just moving the via that is closest to a lead of D1 slightly upwards will connect one area of ground to the other and make a more solid ground.

You might wanna try to start the design again from scratch instead of trying to modify a bad board.

There are pointy haired bald people.
Time flies when you have a bad prescaler selected.

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daqq wrote:
Take a close look at your USB data signals. They are shorted together.

Fixed.

Regardless of that in all of the versions of the PCB you have these signals routed while not respecting the fact that they are a differential signal that should be routed close together. Instead you have one close to the connector, the other one is taking the high way around the connector. While not deadly, I would consider it more proper.

I've rerouted it (again), does it look any better?

At a quick glance your cap placement seems not optimal in some places (see C8 - rotated 90 deg would serve better, or atleast make the track go from the pad and then using a 135 deg line connect onto the processor, instead of just bending it under the part - this gives you two advantages - space under the cap for another track, and a sligthly shorter path from path to device). Something similar should be said for your region around IC6.

You're right, I rotated C8.

Also, C4 should be placed on the path to the FT232, not sideways. It's a bypass cap.

Done, and done!

You'd also might wanna check for part existence, such as C7 - I don't remember seeing a 10uF cap in a package that's smaller than a 1206.

That cap is now corrected to being a 1uF. As suggested earlier in this thread I will use tantalum cap for that one. Will need to make a custom footprint for it.

L1 - seems one connection of it is totally disconnected. According to your schematic it should be connected. The same goes for diode D1.

You are ABSOLUTELY CORRECT!! Which pisses me off to be honest, Eagle is starting to appear to me as a piece of crap. You can see yourself that it appears to be connected in the schematic, although it's not. Fixed it now...

As for R10 and R11 being 3.9k... you should really take a look at how you like the brightness of a LED at 0.6mA.

I have a PCB already made (for another purpose) with 3k9. It's not a problem to see it, but yeah I might ramp that one up. I don't know how much of the thread you've read but the reason for the large cap is that I dont want any significant voltage drop from the LDO regulator as this will affect my sensor measurements.

Take also a look at the region around the FT232 - just moving the via that is closest to a lead of D1 slightly upwards will connect one area of ground to the other and make a more solid ground.

Yup, fixed that one too! :)

You might wanna try to start the design again from scratch instead of trying to modify a bad board.

Well... To be honest, if the pictures I upload with this post still looks a mess to you guys then I might start from scratch using another program. A mate of mine offered me to borrow his EasyPC license, I know that program is a hell of a lot better than Eagle. After incidents like the one with the Diode/Inductor not getting wired I really start to loose my confidence in Eagle - I don't really trust it all that much. I don't want to spend a lot of money manufacturing this board and wait for weeks only for it to have errors on it due to Eagle's shittyness.

I have to say I'm amazed the help you guys are offering me though. I'm learning A LOT from each comment. Let me know if any of you come by Kongsberg, Norway and I'll buy you a beer! :)

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Quote:

Well... To be honest, if the pictures I upload with this post still looks a mess to you guys then I might start from scratch using another program. A mate of mine offered me to borrow his EasyPC license, I know that program is a hell of a lot better than Eagle. After incidents like the one with the Diode/Inductor not getting wired I really start to loose my confidence in Eagle - I don't really trust it all that much. I don't want to spend a lot of money manufacturing this board and wait for weeks only for it to have errors on it due to Eagle's shittyness.

Eagle is a fine tool, you just have to learn how to use it properly. As every tool, it has its advantages and disadvantages. If you'll zoom in on https://www.avrfreaks.net/modules... on the section of the induction L1 you'll notice that the color of the bad pin is different. This is due to the fact that Eagle parts (and most likely everything else parts) have only one POINT on which you can connect a wire to. Make the layer PINS visible in the schematic and you'll know what I'm talking about. You lead the wires endpoint beyond this point, somewhere into the part. Stuff like this happens regardless of your tools.

Oh, and most of the time, the first version of the board is NOT the final version of the board for anything more complex than a blinkie. Don't be disappointed nor discouraged by a non 100% success at first. The first board I had manufactured was a beautifully green, fine traced board, which had two giant pink wires coming over half the board, glued with hot glue as I forgot two signals. Also there we're some extra signals... things got somewhat ugly after that.

As for the current board: At a quick glance it looks workable. But there's still a lot of stuff that, while not critical, would be better (better as in +0.005%), look better or just be a little more proper when done some other way. Like, say:

Your part where the op amps are ( IC3,4) could use a rip up - R7 should be connected to the path in the more analog part of the area. Like you did for R3. If this region was up to me, I'd pull one VCC line from the main bar (the VCC line on the left of the board) and feed the whole analog part with it. Currently you're tapping the power line for this at many places (at one place where you're tapping it to feed the processor and another around JP5.

While we're at power, what's the point of the VCC blob under the processor? You could have easily saved a via there. Notice that your VCC connections are first on top for one pin, then via a via put to bottom, then back up and then distributed onto the rest of the processor.

The new USB routing is better than before, but still... Oh, and notice the function of C3 - it's related ONLY to IC2. And you've enough space there to slap it as close as possible. That is, when you remove the extra bending on the track to the via closest to C13.

There are pointy haired bald people.
Time flies when you have a bad prescaler selected.

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Quote:
The first board I had manufactured was a beautifully green, fine traced board, which had two giant pink wires coming over half the board, glued with hot glue as I forgot two signals.

And why didn't you use a green wire the same color as the PCB to that it blended? 8)

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daqq wrote:
Eagle is a fine tool, you just have to learn how to use it properly. As every tool, it has its advantages and disadvantages. If you'll zoom in on https://www.avrfreaks.net/modules... on the section of the induction L1 you'll notice that the color of the bad pin is different. This is due to the fact that Eagle parts (and most likely everything else parts) have only one POINT on which you can connect a wire to. Make the layer PINS visible in the schematic and you'll know what I'm talking about. You lead the wires endpoint beyond this point, somewhere into the part. Stuff like this happens regardless of your tools.

Oh, and most of the time, the first version of the board is NOT the final version of the board for anything more complex than a blinkie. Don't be disappointed nor discouraged by a non 100% success at first. The first board I had manufactured was a beautifully green, fine traced board, which had two giant pink wires coming over half the board, glued with hot glue as I forgot two signals. Also there we're some extra signals... things got somewhat ugly after that.

Hehe, this made me chuckle loudly - cause it's so true! It's always good to hear about others messing up as well :lol:

As for the current board: At a quick glance it looks workable. But there's still a lot of stuff that, while not critical, would be better (better as in +0.005%), look better or just be a little more proper when done some other way. Like, say:

Your part where the op amps are ( IC3,4) could use a rip up - R7 should be connected to the path in the more analog part of the area. Like you did for R3. If this region was up to me, I'd pull one VCC line from the main bar (the VCC line on the left of the board) and feed the whole analog part with it. Currently you're tapping the power line for this at many places (at one place where you're tapping it to feed the processor and another around JP5.

Yes, it did look a bit messy down there. I made an attempt of tidying things up and think the VCC traces are better now. Attached is a screenshot with the VCC traces highlighted, as well as a better resolution standard PCB export picture. As you can see I added an additional VCC route down to the uC chip.

While we're at power, what's the point of the VCC blob under the processor? You could have easily saved a via there. Notice that your VCC connections are first on top for one pin, then via a via put to bottom, then back up and then distributed onto the rest of the processor.

That VCC blob was probably something that was done to route some other traces, and then i made some changes and the vias weren't needed no more. I cleaned it up now!

The new USB routing is better than before, but still... Oh, and notice the function of C3 - it's related ONLY to IC2. And you've enough space there to slap it as close as possible. That is, when you remove the extra bending on the track to the via closest to C13.

How about now? If this doesnt make you happy, I'd like to know what will :lol: Oh, and I've moved C3 closer to IC2 as well.

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To check connections in EAGLE I often grab a part and drag it around the screen, verifying that all the pin connections 'follow' it. Then "Undo". :)

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I think you have a massive ground loop around the whole board. The top right corner seems to be blocked off from a direct return path to the left, and so the return path will be clockwise past everything else. Star grounding is quite popular, but as long as the path of least resistance/inductance to the power supply is pretty much direct (and not interfering with anything else) then in a lot of cases it will be fine to have a solid ground plane. It can be better for EMC as well.

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I realise we are getting close, but what's with the 2011 in your logo?

Ross McKenzie ValuSoft Melbourne Australia

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valusoft wrote:
I realise we are getting close, but what's with the 2011 in your logo?

As mentioned in my OP, that logo is supposed to be somewhat lame. And this board will at best finish within 2011, even though we are in 2010 right now.

That logo is the least of my worries, what matters is the board working.

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Cameron707 wrote:
I think you have a massive ground loop around the whole board. The top right corner seems to be blocked off from a direct return path to the left, and so the return path will be clockwise past everything else. Star grounding is quite popular, but as long as the path of least resistance/inductance to the power supply is pretty much direct (and not interfering with anything else) then in a lot of cases it will be fine to have a solid ground plane. It can be better for EMC as well.

Yeah, just as I uploaded my last picture I discovered I had left out that thick ground trace going from the 7805 GND and straight down to the GND plane (just as in my 2nd last post). That should make the looping problem solved, right?

In case I didnt explain it well enough, I'll attach a picture. The only difference from this version and the one from my last post is the GND connections at the top. I added an additional bottom layer track from the 7805 to the power connector as well.

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With every iteration, you get a better board. I use KiCAD for most of my board designs at home (and Cadence Allegro at work, but obviously can't afford that license for home :-) ); KiCAD is free and doesn't have many of the restrictions that the free Eagle has.

There are still a few places where you have tracks connecting at rather acute angles (the output of the 7805, for example).

There are also some places where moving a component or via could let the top plane be more continuous:

- move c3 up a bit, and then the ground from IC2p18 will connect through to the plane on the left; likewise moving the via connected to IC2p19 will allow the plane from pin 21 to connect through
- Move R13 and C10 (whose ref des on the silkscreen is on top of the pads) to the right of J2. That would let you move C9 closer to the pin on IC1 that it is bypassing.
- Move the vias and track connecting to the S_Vert connector pin 3 down a little

I would make the layout for the two opamps the same; there's enough space to do that, and it will make loading and debugging easier.

As for R14, you are OK with one resistor if only one diode is on at a time, but you may want the ability to tailor the resistor value for each diode since the forward drop (and the eye's response curve) is different for each color.

If the analog is that sensitive, you may want to use a separate regulator for it (or possibly take Aref from the processor and buffer it with an opamp). You may also want to filter its power with a ferrite bead and cap.

Here's how I wired up an FT232RL on a recent board I did (GND and +5 are planes - it is a 4-layer board); rotating it helps clean up the layout a bit:

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rg2720 wrote:
That should make the looping problem solved, right?

Yeah it has a more direct return path now.

It's probably not so obvious, but you can actually create small unwanted voltage potentials if the grounding is done incorrectly.

For example consider a basic opamp circuit with an AC input. The input has a burden resistor before the opamp but the burden resistor is on a separate and far away ground plane. Since the 2 ground points were far away there was a small resistance between the points which induced a voltage which was then amplified. Hard to understand? Well have a look at this pic.

The resistor circled is the resistance between the 2 ground points. The arrow path is effectively now the burden resistor. What happened to us is that we observed a small signal at the output of certain opamps even when we had our imput connected to a completely different opamp.

It's a little hard to wrap your head around this stuff, and to be honest it's still a bit hazy in my mind, but it's good to think about this stuff before it trips you up.

In any case I think your ground plane is ok now so don't stress :).

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Thanks again everybody! Your replies has learned me so much and made me aware of so many things that I decided to re-route the whole thing (again), which is why I have not replied in this thread for some days. Below is the result, what do you guys think?

Is it an improvement or did I just make things worse? :lol:

Mike: I tried to wire my FT232 layout the same way you did. I also grouped the opamp circuits the same and put in resistors for each of the RGB leds (allthough the values may be changed). I also wired all the LEDs to VCC2, which is the 7805. This will hopefully keep my LDO regulator stable (no voltage drop) when LEDs are turned on. I also changed the cap for the LDO to a alu electrolytic cap. This time i made the top layer GND(red) and the bottom layer VCC(blue). I have stitched the planes together a couple of places. And I know the heatsink on the 7805 will be in the way, but I'm not going to have a heatsink on there as the average current will be low.

Edit: Uploaded Gerber file pictures as well :)

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This is my variant.

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Variant of what? Not sure I follow.

Any other comments about this latest version of the board? :)

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This variant shows how to connect OP AMP to connector with minimal wire lenth.
Place C11 and C12 near OP AMP power pin 7.

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Any other thoughts on this? I might actually go on and have this board manufactured now if you guys gives me the thumbs up.

Last chance, anyone? :D

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Looks much better :) I would have added vias to ground near all grounded pads. You still have some "long" ground paths between decoupling capacitors and the ground pins they are supposed to be connected to.

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janeyolf wrote:
Looks much better :) I would have added vias to ground near all grounded pads. You still have some "long" ground paths between decoupling capacitors and the ground pins they are supposed to be connected to.

Thanks! :) However, there are actually no vias going to ground as the top layer is the GND plane. But I guess your point still stands in regard to VCC, which needs vias to them since bottom layer is VCC.

Or am I mistaken here?

Godt å se flere nordmenn her forresten :)

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Ok. I would prefer a dedicated ground plane (bottom) with a two layer board. Or you could e.g. rotate C8 so that it's closer to the AVR ground pin.

Dette var vel pensum på industrielle datasystemer? :)

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Ok guys, here are the finished boards - manufactured by PCBCart.com.

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