FPGA Configuration from AVR

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Hi,

Just seeing if anyone has done a FPGA configuration memory using AVR + DataFlash or something like that?

I've got a FPGA board that has a socket for an 8-pin device. However the reprogrammable FPGA configuration memory devices are around $40 or more (its a Xilinx XC2S200E in case anyone was wondering), so I was hoping to make my own with AVR and DataFlash. Won't be blazing speed but...

Its not terribly difficult I think, but before I get started I wondered if anyone had done similar, and had any code or advice?

Thanks,

-Colin

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XC2S200E looks like the FPGA, not the config memory.

That device takes a config memory space of 1,442,016 bits! That is 180K bytes! I doubt that you well get there with an AVR and a DataFlash. Now, if you simply want to use the AVR as the loader/translator between external DataFlash and FPGA, mabe you do have a chance.

Jim

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Hi Colin.

Check out this link

http://direct.xilinx.com/bvdocs/...

It is called "Xilinx In-System Programming Using an Embedded Microcontroller" and uses the JTAG interface for programming.

hope this helps.

Regards

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Now, if you simply want to use the AVR as the loader/translator between external DataFlash and FPGA, mabe you do have a chance.

Oh yes, thats all I'm planning on doing - I'm not THAT crazy ;-)

Check out this link

Thanks for the link - didn't see that before! Hmm now do I want to go JTAG or normal serial... have to figure out how much of each my development board supports.

-Colin

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You might also want to have a look at the new XCF series of configuration PROM. these function just like the XC18 series. Only they have new, much cheaper tehnology.
My sales rep did warn for bad lead times, however. He expects there will be a run on them soon.

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"It is called "Xilinx In-System Programming Using an Embedded Microcontroller" and uses the JTAG interface for programming."

Configuration through Slave-Serial Mode should be even easier... haven't done it in software myself but shouldn't be a problem.

Look it up in the data-sheet

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Hi,

Actually those XCF devices look promising. And they are JTAG programmable, which solves the programming problem (already got JTAG for the FPGA on the board).

I'm talking to someone at Xilinx now, and I think I'll be able to get an Engineering Sample...

Thanks for all the ideas!

-Colin

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My sales rep of Insight said that they are fully compatible to the XC18F series. It's just another technology. So indeed very interesting. I already managed to order 12 pieces. Luckily to me that's a years supply. :-)

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About 2 years ago I did something similar with an AT90S8515 and two or three 24C64/128 (depending on LCA size). Worked without problems.

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Hi Guys,

There is a complete! design using an AVR and dataflash to boot an FPGA. I helped write it when I was an Atmel FAE and I've posted on the codevision news group in yahoo.

Look at http://groups.yahoo.com/group/co... in the "project files/flash access/dataflash fpga loader" section

We did it as a demo of the technique and only used the codevision compiler but thats only $150. The avr and dataflash should come in under $5 so you'll be saving after you've made a few units. I never understood why it didn't attract more attention but FPGA guys are kinda conservative ($40 for an eeprom...)

Hope it helps,
Murdo.

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Not anymore. The XCF series are supposed to cost about $5 each at moderate quantities.

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Hi,

There is a complete! design using an AVR and dataflash to boot an FPGA. I helped write it when I was an Atmel FAE and I've posted on the codevision news group in yahoo.

Great, thanks for the project link! For now I'm still seeing if I can get myself a free sample, as its just easier to go that way right now... total cost is $0.00 ;-)

The XCF series doesn't seem to be anywhere yet (findchips.com showed none)...

-Colin

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Yups, hard to beat $0.00 :-)
I got my XCF01s at Insight. This is I think a pretty big company, so you might want to try to get it there.

Still this AVR idea is mighty interesting. It would be a nice opurtunity to store configuration data on a flash disk. Depending on whether or not the design already had a lot of non volatile memory it could simplify design.

How do you get the proper data to store into dataflash? Is that in the design note? I will go and take a look.

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How do you get the proper data to store into dataflash? Is that in the design note? I will go and take a look.

You use a high speed serial interface. The design as is, uses the AVR X/Y modem app note to do the transfer.

Before I left, I wanted to tie one of those FTDI usb interface chips into the design but never got the chance. The beauty is that you could then use usb to program your bitstream at high speed, without needing any X/Y modem to slow it down.

The other advantages of the avr/dataflash booting is that you can store multiple bitstreams in one device and then boot the one you need into the fpga as you need it - may let you use a smaller fpga than needed to hold everything. Plus you get a small AVR (eg Mega8) to monitor the system, manage the power supply, do the ADC or whatever.

App note is pretty complete and the code is readable so I hope it helps.

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