FreeRTOS disabling level 0 interrupts

Go To Last Post
3 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi,

I'm building an application where I must generate several signals with quite precise timing (about 1us resolution). As I have too many signals to generate I can't use PWM channels. So I decided to generate the signals in a timer interrupt. That works OK, but I found out my interrupts had some jitters, and noticed this jitter was caused by FreeRTOS disabling interrupts.

The solution I found was to transform the port code, from this:

#define portDISABLE_INTERRUPTS()  DISABLE_ALL_INTERRUPTS()
#define portENABLE_INTERRUPTS()   ENABLE_ALL_INTERRUPTS()

to this:

#define portDISABLE_INTERRUPTS()  DISABLE_INT_LEVEL(0)
#define portENABLE_INTERRUPTS()   ENABLE_INT_LEVEL(0)

I configured a higher priority for my timer interrupt, and now FreeRTOS is not disturbing it.

So here comes my question : do you think it's safe to just disable the lowest level of interrupt? May that break something if an interrupt occurs in an OS critical section?

Thanks,
Julien

Open Servo Control Board: http://openscb.org

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I finally found out the answer, it was in the documentation of configKERNEL_INTERRUPT_PRIORITY on http://www.freertos.org/a00110.html.

From what I understand, this modification is safe only if the higher priority level interrupt handlers do not use any OS function.

Julien

Open Servo Control Board: http://openscb.org

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Quote:

From what I understand, this modification is safe only if the higher priority level interrupt handlers do not use any OS function.

Correct. As long as the level 0 interrupt level does not change any operating system structures everything will work fine. Otherwise, you could have a race condition where a low-level task in a critical section becomes interrupted while modifying some OS structure and the two changes lead to some undefined behavior.