Pin configurations when sleeping

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Hello
I was thinking about how to set up the digital i/o pins when putting the AVR to sleep.
If I have a peripheral connected to a few AVR pins, both inputs and outputs, and the VCC to the peripheral is shut down before the AVR is put to sleep. How should I configure the AVR pins?

If the peripheral is completely powered off is it best to HiZ all pins, both outputs and inputs from the AVR? Or maybe the output pins from the AVR should be driven low while the input pins should be HiZ?

What if the peripheral is not completely powered off, if there is a small leakage in the power switch that controls the VCC of the peripheral?

I did a quick test with two applications on the same PCB; one with all HiZ and the other with outputs low and inputs HiZ and the low outputs version seemed to be 0.1 µA lower. But is there theoretical support for my test result?

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Just because the AVR is sleeping why would you want to change the outputs it may be driving? The outputs are statically latched anyway.

If you are worried about power consumption then the usual factors mentioned in AVR040/AVR042 apply. You don't want to let inputs simply float to highZ - maybe enable the internal pull-ups to tie them to a rail?

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Because I turn off the VCC to for example the external serial EEPROM I can not have CS driven high because then the EEPROM will run using power from the AVR pin. And this is the case for several external components that are powered off during AVR sleep.

So if the external chip is unpowered all its outputs would be low, is it not better to have the inputs of the AVR set to HiZ then?

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Quote:

is it not better to have

One size doesn't fit all situations. It sounds like you are concerned with nA, so then yes, each connection must be considered on its own. You may find that in a particular case, you may want to use a weak external pulling resistor and float the AVR pin(s). In another case, you may just want to drive them all low when the power is off to the attached device. Or...

An AT25 draws ~1uA in standby, so you must be concerned with nA. Every bit of the design must be considered, then, down to capacitor and diode leakage. And also why a serial EEPROM is needed anyway. :twisted:

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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theusch wrote:
each connection must be considered on its own.

I suspected that this was the case but I was hoping that there was an easier general rule that could be applied. Well I better get back to the lab to do some extensive testing then =)

Yeah almost down in the nA range now as power consumption is the second most important factor in the design of the product. Unfortunately price is the most important.

Thanks.