triggered DMA on Xmega

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Is there someone who succeeded in setting up the
Xmega128A1 so that the DMA is used to transfer
bytes from a peripheral to RAM with triggering from
an event source ?

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This is from one of the Boston Android example programs (http://www.bostonandroid.com/examples/xmega-dma-adc-buf.c) for our Xmega EVAL-USB boards (http://www.bostonandroid.com/products.html). It doesn't use events, but that just requires changing the trigger source to an event channel:

// configure DMA
  DMA.CTRL = 0x80;    // Enable, single buffer, round robin
  DMA.CH0.ADDRCTRL = 0xC5;// Reload, fixed source
  DMA.CH0.TRIGSRC= 0x10;  // ADCA CH0 is trigger source
  DMA.CH0.TRFCNT = 100;   // Buffer is len bytes
  DMA.CH0.DESTADDR0  =(((uint32_t)gADCBuf)>>0*8) & 0xFF;
  DMA.CH0.DESTADDR1  =(((uint32_t)gADCBuf)>>1*8) & 0xFF;
  DMA.CH0.DESTADDR2  =(((uint32_t)gADCBuf)>>2*8) & 0xFF;
  DMA.CH0.SRCADDR0 =(((uint32_t)(&ADCA.CH0.RES))>>0*8)&0xFF;
  DMA.CH0.SRCADDR1 =(((uint32_t)(&ADCA.CH0.RES))>>1*8)&0xFF;
  DMA.CH0.SRCADDR2 =(((uint32_t)(&ADCA.CH0.RES))>>2*8)&0xFF;
  DMA.CH0.CTRLA = 0xA5;   // Enable, repeat, 2 byte, burst 

The above code transfers data from the ADC peripheral to RAM (to a global buffer).

You just need to modify the line:
DMA.CH0.TRIGSRC =

where trigger event is:
Event ch0: 0x01 + 0x00
Event ch1: 0x01 + 0x01
Event ch2: 0x01 + 0x02

This is detailed in the Xmega family datasheet:
http://www.atmel.com/dyn/resources/prod_documents/doc8077.pdf

You just need to specify the peripheral register you want and possibly the source data size. The code above accesses a 2 byte source register (ADCA.CH0.RES).

I think this should work for you.

Cheers.
-Paul

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Thanks, I will try that. If I see it right,
you use a fixed source address. Can you read 2 bytes
of the ADC in this way ?

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There may be a typo there in the code (or bug). The addrctl should be 0x95, source reload after each burst and increment after each byte. Although in burst mode I think it automatically copies successive bytes.

-Paul
-Paul

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I sit a long time on this problem with direct DMA transfer of the ADC values, but finally i got it with the ATXMega64A3. I don't know exactely how great the differences are between the A1 and the A3 series of the XMegas, but here are the sources and a small video --> http://www.christoph-lauer.de/Ho...

best,
christoph lauer