Bad batch of ATXMEGA256A3?

Log in or register to post comments
Go To Last Post
8 posts / 0 new
Author
Message
Avrfreakscarel
Avrfreakscarel's picture
Level: Wannabe
Joined: Tue. Feb 26, 2002
Posts: 92 View posts
Location: South Africa
#1
Posted by Avrfreakscarel: Wed. Mar 17, 2010 - 01:52 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi all

Some help would be appreciated.
We have developed our project on ATXMEGA256D3, while planning to use ATXMEGA192D3 in production. We have received some ATXMEGA256A3 samples, and we have built 4 boards. Strange thing is, that PORTB, b5&6 on all of these are reading as zero, even when they are at a high voltage (when we measure). We are applying 0xF0 to the pins, but it reads back as 0x50...

If we take the same board, and replace the chip with a D3, it works fine as expected.

Does anyone have any experience in this?

kind regards
Carel

www.pteq.net
Home of:
- Polygon Technologies CC

Tags:

AVR Microcontrollers, megaAVR and tinyAVR
Top
clawson
clawson's picture
Level: Moderator
Joined: Mon. Jul 18, 2005
Posts: 97554 View posts
Location: (using avr-gcc in) Finchingfield, Essex, England
Posted by clawson: Wed. Mar 17, 2010 - 01:54 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

What does the datasheet say for "alternate use of IO" for those pins? Not a debug interface by any chance?

Top
david.prentice
david.prentice's picture
Level: 10k+ Postman
Joined: Sat. Feb 12, 2005
Posts: 29316 View posts
Location: Wormshill, England
Posted by david.prentice: Wed. Mar 17, 2010 - 02:01 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

You beat me to it.

David.

Top
clawson
clawson's picture
Level: Moderator
Joined: Mon. Jul 18, 2005
Posts: 97554 View posts
Location: (using avr-gcc in) Finchingfield, Essex, England
Posted by clawson: Wed. Mar 17, 2010 - 02:20 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Good grief the Atmel site is slow to download datasheets but having finally got a copy of the A3 data I find it (like most Xmega data) almost completely inpenetrable at first glance. It seems impossible to get a straight answer to a straight question.

HOWEVER:

A3 data wrote:
29.3.1Boundary-scan Order
Table 30-8 on page 53 shows the Scan order between TDI and TDO when the Boundary-scan chain is selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The scan order follows the pin-out order. Bit 4, 5, 6 and 7 of Port B is not in the scan chain, since these pins constitute the TAP pins when the JTAG is enabled.

Which seems to confirm that JTAG is on PB4..PB7

Quod erat demonstrandum.

Top
Avrfreakscarel
Avrfreakscarel's picture
Level: Wannabe
Joined: Tue. Feb 26, 2002
Posts: 92 View posts
Location: South Africa
Posted by Avrfreakscarel: Wed. Mar 17, 2010 - 02:45 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi Guys

MANY THANKS for the replies!
First thing I did was to measure the actual voltages
Second thing was to check alternative functions..
I discarded the jtag as unimportant, since we never use it, and it has never bothered us before on any device.

And then I checked the fuse bits..
and found that the jtag was in fact enabled...

oops.

Thanks guys!

www.pteq.net
Home of:
- Polygon Technologies CC

Top
dkinzer
dkinzer's picture
Level: Posting Freak
Joined: Fri. Mar 12, 2004
Posts: 1299 View posts
Location: Portland, OR, USA
Posted by dkinzer: Wed. Mar 17, 2010 - 02:49 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

clawson wrote:
It seems impossible to get a straight answer to a straight question.
Table 29-2 Port B - Alternate functions (ATxmega A3 datasheet) clearly shows JTAG on the high bits of Port B. In contrast, Table 27-2 for the D3 shows no JTAB on Port B.

Don Kinzer
ZBasic Microcontrollers
http://www.zbasic.net

Top
clawson
clawson's picture
Level: Moderator
Joined: Mon. Jul 18, 2005
Posts: 97554 View posts
Location: (using avr-gcc in) Finchingfield, Essex, England
Posted by clawson: Wed. Mar 17, 2010 - 02:54 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Don,

Then I must have a different document to you. There is not Table 29-2 in mine. There are very few tables in the document I just downloaded (8068Q–AVR–02/10). I went back as far as Chapter 14 and didn't see a single table. Going past Chapter 29 the first table I come to is 30-1

Oh, wait a minute, maybe it's table 30-2 you are meaning? But why isn't that table in Chapter 15 where it discusses the IO (specifically the "alternate use" subsection)? That's where it would have been found in all prior AVR data.

Top
dkinzer
dkinzer's picture
Level: Posting Freak
Joined: Fri. Mar 12, 2004
Posts: 1299 View posts
Location: Portland, OR, USA
Posted by dkinzer: Wed. Mar 17, 2010 - 03:52 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

clawson wrote:
Then I must have a different document to you.
Sorry, I was looking at an older version: 8068L–AVR–06/09.

However, you'll note that in the section on Alternate Port Functions (15.6 in the newest version) there is a link to "Pinout and Pin Functions - Page 49" that takes you to Chapter 30 containing the alternate pin functions tables.

Don Kinzer
ZBasic Microcontrollers
http://www.zbasic.net

Top