USART Inverted Data on 128

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Hi,

I'm trying to talk to a SED1565 GLCD. Anyhoo... When I set up Synchronous Tx on a 128L everything is beautiful - signal comes on rising clock, etc. -- only one problemo: The data pin (TXD1) is *Hi*, and flips down to grnd and back up w/ signal. In looking at another chip (unknown; but was driving the SED1565 successfully) I see that it's data signal is at GROUND, and flips up to Vcc w/ signal. I don't see a setting for this in the UART regs... I understand that the way the 128's doing it may be corrct serial 'standard'.

I thought maybe the 128 has a register to "Invert pin" er something. (wishfull thinking - i know). I guess I could write an int on another pin which inverts whatever's on the Tx pin.. 'nuther thought was to use a different proto (like SPI 2W, etc.), as some of these look like they have polarity as settings...

Any ideas?

Thanks,
Robert

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I Think you'll be out of luck with this, most if not all UARTs/USARTs idle high at the logic level outputs. I've never come across any that idle low.

Four legs good, two legs bad, three legs stable.

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Having just looked at the Epson spec, you should be using the SPI module, not the synchronous USART. The USART sends bit 0 first, while the SPI sends bit 7 first.
Alternatively, if you're already using the SPI pins, you could always bit-bang, being a synchronous protocol the timing shouldn't be critical.

Four legs good, two legs bad, three legs stable.

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John,

Thanks for your response and suggestion - I'll try 'hooking-up' SPI today. Any warnings for this endeavor?

Thanks again,
Robert

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No, I've only used graphics LCDs in parallel mode, but it all looks quite straightforward.

Four legs good, two legs bad, three legs stable.