ADC noise and inductors

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I am conducting an experiment where I would like to use a home-made strain gauge based load cell to measure dynamic loads.

Here is my hardware:

Strain Gauges -> Wheatstone bridge -> A/D Converter (ATMEGA48) -> UART -> RS232 -> Laptop computer

This setup works well, but I would like to go back and improve the system so that I can get better resolution. Currently at full scale I am reading only 86 mV off my wheatstone bridge. My current plan is to use a MAX4194 instrumentation amplifier to get more resolution. How ever for this to have any positive effect I need to reduce the 5 mV p-p of noise that I am reading on my ADC. 5 mV is tolerable for my application but it would be nice if their was an easy way to reduce this.

Currently I am not doing much to manage noise:
1) Power is supplied by batteries so no 60 Hz
2) 20 uF cap (ceramic thru-hole) at vcc and 20 uF at AREF pin.
3) Vcc and AVcc are straight connected

I am guessing that I will get the best improvement by adding a 10 uH inductor as recommended in the datasheet.

What do you think is the best way to reduce noise for the least effort/time?

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The data sheet approach is ok, but is limited.

Look at your VCC, and see where the noise is, and filter that. A spectrum analyzer can be most useful.

Barring that, use a regulator like the ISL9000 which has the largest PSRR I've seen, to supply the digital part of the chip from one side and AVCC from the other side.
http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=ISL9000IRPLZ-TCT-ND

I used this reg in a digital imager, where I split out the analog and digital sides of the imager, and supplied the logic and LVDS part from one ISL9000, and the analog and pixel supplies from the other ISL9000. These imagers are tough because any noise on the pixel supply goes directly into the image. We were working with near-starlight levels, and exposure times of around 1S, so I had to be vewwy vewwy qwwwiet.. hahahaha.
(elmer fudd, hunting wabbits!)

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dbvanhorn:

Thanks for the suggestions. A spectrum analyzer would be awesome. Aren't those like $4000? I think that might not fit in my $150 budget for this project ;).

What would you estimate the noise reduction would be by using two ISL9000 regs vs adding an inductor? Maybe 50% vs. 20%?

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That would depend greatly on the noise, but I would expect more like a 30dB advantage.

From the data sheet:
Low output noise: typically 30μVRMS @ 100μA (1.5V)
Very high PSRR: 90dB @ 1kHz

Do you think you're going to get anywhere near that with a stage or two of LC filtering?

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Quote:

What do you think is the best way to reduce noise for the least effort/time?

A simple-minded bit-pusher might say to take a number of successive readings, and see if the simple average takes care of the situation. It often/usually does for me with ripple.

Or, one step further with a "real" digital filter.

If you need to take readings in microseconds, then that approach isn't too attractive. But I've done a number of pneumatic controllers where the signal can be fast changing, but closing the loop every few milliseconds is fine--when the signal is changing it is moving in one direction and you "catch up" soon anyway. And a number of readings at max res can be taken in a few ms.

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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dbvanhorn wrote:
That would depend greatly on the noise, but I would expect more like a 30dB advantage.

From the data sheet:
Low output noise: typically 30μVRMS @ 100μA (1.5V)
Very high PSRR: 90dB @ 1kHz

Do you think you're going to get anywhere near that with a stage or two of LC filtering?

I have no idea what to expect from LC filtering. I guess I shouldn't expect much since I don't know what frequency I am dealing with. Although now that I think of it the noise is probably mostly due to my UART which runs at 57.6 kHz.

Can you recommend a regulator with maybe not as good PSRR performance but is easier to get a hold of? Octopart says only summit electronics have them. I have never purchased from them but I am guess that they will have a minimum order. Also a through hole package would be nice.

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Arrow has them.

You could use most three terminal linear regulators this way, and they will probably be good enough to get you to the next layer in the onion, which is likely to be board layout or some such.

Averaging helps if you can wait that long, and if you don't need a lot of reduction in the noise. An average of two samples gives you 3db reduction, you'll have to average a TON of samples to get anywhere near 90dB

If noise is periodic, you may be able to dither the sampling intervals, basically doing a 'spread spectrum' noise reduction for any repetitive signals.

There's internal noise in the chip that may be significant, but all you can really do is apply some techniques and see what happens.

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theusch wrote:
Quote:

What do you think is the best way to reduce noise for the least effort/time?

A simple-minded bit-pusher might say to take a number of successive readings, and see if the simple average takes care of the situation. It often/usually does for me with ripple.

Or, one step further with a "real" digital filter.

If you need to take readings in microseconds, then that approach isn't too attractive. But I've done a number of pneumatic controllers where the signal can be fast changing, but closing the loop every few milliseconds is fine--when the signal is changing it is moving in one direction and you "catch up" soon anyway. And a number of readings at max res can be taken in a few ms.

Lee

Its funny you mentioned digital filtering, [brag]I actually authored the digital filtering tutorial in the tutorials section.[/brag]

The data that I am trying to capture is actually a transient impact that occurs in a period of about 20 ms. A typical digital filter would* introduce error into the measurement so my plan is to record the raw data and then implement a butterworth filter in MS Excel.

I don't think that the butterworth filter alone will be enough.

*edit spelling

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Quote:
I have no idea what to expect from LC filtering. I guess I shouldn't expect much since I don't know what frequency I am dealing with. Although now that I think of it the noise is probably mostly due to my UART which runs at 57.6 kHz.
I take it back.

Here is my timing

t= 0ms: ADC starts conversion
t= .104ms: UART fires two bytes immediately following the conversion
t= .451ms: UART finishes
t= 1.00ms: UART fires two more bytes
t= 1.35ms: UART finishes
t= 2.00ms: ADC starts next conversion and cycle repeats

My point is that the UART never fires at the same time a conversion is taking place. So that means my noise must be from a different source. Could it be the internal 8Mhz clock generator in the ATMEGA48? Would a crystal be better?

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No way to know other than to try it.

First though, set up the inputs with just an equivalent voltage generated by resistors with short leads, and heavy filtering. See what noise you get.

That is likely "internal chip" noise, which might be helped by the noise reduction settings for the chip.

Agreed on analog filtering, it causes phase shifts over frequency that can be pretty awful. With digital filtering after the event, you can avoid a lot of that.

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If you start the hardware UART just before starting a conversion, the data are transmittet just when the conversaion is running.

Its probably worth trying the inductor from Vcc to AVcc. In may cases its enough to get the noise on Avcc so low that it is not the limiting factor anymore. For the capacitors, a 100 nF SMT can be better than the 20µF though hole. Even for a beginner, soldering a size 0805 SMT capacitor is not that difficult. Usually a 100 nF capacitor at AREF is large enough. For a bridge circuit the ref voltage and the driving voltage for the bridge should come from the same source.

If you need an AD reading only every 2 ms, it is porbably better to do more reading, like 8, every 125 µs and just use the sum. This makes the design of the analog anti aliasing filter much easier and the filter more effective.

I am not shure the max4194 is a good choice. You don't realy need rail to rail Inputs but you need low noise at moderately low frequencies. The max4195 has quite a low of shot noise even in the 100 Hz range.

It may be easier to use an external high resolution AD converter (e.g. LTC2440), even without any amplifier.

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Take a look at LTC2053 which should be Linear Technology switched cap input amp. It is autozero, very low noise and offset down under 10 microvolts. The switched cap input samples the input voltage which integrates the noise out of it. For low frequency measurements it is a good part. Digikey would stock it.

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dbvanhorn wrote:
No way to know other than to try it.

First though, set up the inputs with just an equivalent voltage generated by resistors with short leads, and heavy filtering. See what noise you get.

That is likely "internal chip" noise, which might be helped by the noise reduction settings for the chip.

Agreed on analog filtering, it causes phase shifts over frequency that can be pretty awful. With digital filtering after the event, you can avoid a lot of that.

Thanks for the tip. I will try this.

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Kleinstein wrote:
If you start the hardware UART just before starting a conversion, the data are transmittet just when the conversaion is running.

Its probably worth trying the inductor from Vcc to AVcc. In may cases its enough to get the noise on Avcc so low that it is not the limiting factor anymore. For the capacitors, a 100 nF SMT can be better than the 20µF though hole. Even for a beginner, soldering a size 0805 SMT capacitor is not that difficult. Usually a 100 nF capacitor at AREF is large enough. For a bridge circuit the ref voltage and the driving voltage for the bridge should come from the same source.

If you need an AD reading only every 2 ms, it is porbably better to do more reading, like 8, every 125 µs and just use the sum. This makes the design of the analog anti aliasing filter much easier and the filter more effective.

I am not shure the max4194 is a good choice. You don't realy need rail to rail Inputs but you need low noise at moderately low frequencies. The max4195 has quite a low of shot noise even in the 100 Hz range.

It may be easier to use an external high resolution AD converter (e.g. LTC2440), even without any amplifier.

I think that you misunderstood my timing. I meant to say that the UART starts immediately after the conversion completes.

You are right that I will get a better result sample faster. I will be sure to do that.

If I were to start all over I would definatly consider an A/D chip.

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I recorded that data from the UART and got a very strange result. The noise appears to be perfectly periodic.

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My first thought is that it must be my software, but I cant find anything that repeats at a frequency of 62.5 Hz. At this point I am pretty baffled. Here is my code:

#include 
#include 
#include 
#include 
#include "Initialize.h"

#define F_CPU 8000000  // Note: if this is changed, A/D settings must change
#define BAUD 57600
#define DOUBLESPEED 1
#define UBRR ((uint16_t)(F_CPU/((2 - DOUBLESPEED)*8.0*BAUD) - 1 + 0.5))//0.5 is for proper rounding
#define FREQ 1000
#define CH0 (0 | (1<<REFS0))
#define CH1 (1 | (1<<REFS0))
#define RANGE 32

volatile uint8_t latch_flag = 0;
volatile uint16_t adata0_f;
uint16_t adata0;
uint16_t adata1;
uint16_t history[RANGE];
uint8_t h_pointer;
uint32_t filter_pool;

uint16_t peak_peak(uint16_t *s);

ISR(USART_RX_vect)
{
	UDR0 = UDR0;
}

ISR(ADC_vect)
{
		adata0 = ADCW;
		filter_pool = filter_pool - adata0_f + adata0;
		adata0_f = filter_pool>>9;
		transmit_code(0, (adata0 - 486));
		latch_flag = 1;
		TIFR1 |= (1<<TOV1);//Clear the timer overflow interrupt flag
}

int main(void)
{	
	//Initialize UART*******************************************************************
	UBRR0H = (uint8_t)(UBRR>>8);
    UBRR0L = (uint8_t)(UBRR);
	UCSR0A |= ((1<<U2X0)*DOUBLESPEED); // DOUBLE SPEED MODE (BAUD = XTAL/(8*(UBRR+1)))
	UCSR0B = (1<<TXEN0)|(1<<RXEN0)|(1<<RXCIE0);  //ENABLE UART
	UCSR0C = (3<<UCSZ00);  //8-BIT RS232, 1 STOP BIT, NO PARITY
	
	//Initialize Timer
	TCCR1A = (1<<WGM11)|(1<<WGM10); 		 				 //NON-INVERTED, OCR1A FREQ CONTROL
	TCCR1B = (1<<ICES1)|(1<<WGM13)|(1<<WGM12)|(2<<CS10);   //FAST PWM MODE, PCK=XTAL/8 (PWM FREQ=XTAL/(8*(1+ICR1))), ICP noise canceling, positive edge trigger
	OCR1A = ((F_CPU/(8*FREQ))) - 1;//

	//Initialize ADC
	ADMUX = CH0;  //SET REFERANCE VOLTAGE TO VCC, CHOOSE PIN 0
	ADCSRA = (1<<ADEN)|(1<<ADSC)|(1<<ADATE)|(1<<ADIE)|(1<<ADPS2)|(1<<ADPS1);  //ENABLES ADC, STARTS 1ST CONVERSION, AUTOTRIGGER, ADCLOCK = XTAL/8
	ADCSRB |= (1<<ADTS2)|(1<<ADTS1);//Select TOV1 as interrupt source.
	
	sei();
	
	while(1)
	{	
		_delay_loop_1(5);
		cli();
		if((TCNT1 > (F_CPU/(16*FREQ))) && latch_flag)
		{
			sei();
			transmit_code(1, (adata0_f - 486));
			latch_flag = 0;
		}
		sei();
	}

	return(1);
}

uint16_t peak_peak(uint16_t *s)
{
	uint16_t max;
	uint16_t min;
	uint8_t i = 0;
	max = *s;
	min = *s;
	while(++i < RANGE)
	{
		if(*(s+i)> max)
			max = *(s+i);
		if(*(s+i)< min)
			min = *(s+i);
	}
	return(max - min);
}

Here is initialize.c:

#include 
#include 
#include 
#include "initialize.h"


void long_delay(uint16_t cycles)
{
	for(; cycles > 0; cycles--)
	{
		_delay_loop_2(32000);
	}
}

void transmit(uint8_t info)
{
	while(!(UCSR0A & (1<<UDRE0)))
		;
	UDR0 = info;
}

void transmit_code(uint8_t channel, uint16_t value)
{
	twobyte integer;
	integer.lo = value | 0b10000000;
	integer.hi = (value>>7) & 0b00001111;
	integer.hi |= channel<<4;
	UDR0 = integer.hi;
	while (!( UCSR0A & (1<<UDRE0)))
		;
	UDR0 = integer.lo;
}
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Unplug your wall adapter to your laptop and see if it goes away.

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alwelch wrote:
Unplug your wall adapter to your laptop and see if it goes away.
I actually recorded that data using my desktop, but I see what you are thinking.

I will try it on my laptop after it charges for 10 minutes :).

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Quote:

If I were to start all over I would definatly consider an A/D chip.

??? And how would adding another chip, and the leads thereto, solve a noise problem?!?

Soapbox: The much-maligned AVR A/D converter will do just fine, operating according to specs, in a clean analog design. Yes, it is 10 bits. Yes, it ain't screamin' fast. If those are critical factors (and we haven't seen that yet in your app) then I'd agree to get the right chip for the job.

The beauty of an AVR microcontroller app, especially in the say Mega88 class, is the practicality of near-single-chip designs. The exception(s) as always are power supply and signal conditioning. In non-critical apps the "signal conditioning" may be nothing more than careful layout and protection from the real world--often few extra components.

Once you have decent analog conditions and acceptable signal drive, then the AVR ADC works just fine, thank you. With a bit of simple averaging I get near-10-bit results, perfectly linear, no missing codes as best as can be measured--that's about 0.1%.

We have bridge apps as well, and get good results even without instrumentation amps.

From the plot you posted, it looks like ~30Hz to me--3 cycles between 80ms and 180ms.

You have to look for the ripple at all points in the analog section--AGND, AVCC, AREF, and signal. Find it first.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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theusch:

Thanks for your perspective. I guess I got a little bit of grass is greener syndrome.

Anyway, back to the problem I am trying to figure out.

I tried it on my laptop running on battery power and I got the same result.

One thing that makes me think it is software related is how perfectly periodic it is. Here is a larger time frame:

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The frequency is about 30 Hz. There are not may sources that direktly give you 30 Hz. The only thing I can immaginge would be a mechanical resoance of the balance.
So its more likely the 30 Hz come from some undersampling or similar. So the real frequency is probabaly higher, probabaly N*Fsampling + 30 Hz. So you should get a scope an look at the signal that comes to the ADC.
The brute force method would be to have a good antialiasing filter to blcock the high frequencies.

The beauty of some of the high resolution ADs is that they can also replace the amplifier, since they directly get µV resolution.

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I was watching the waveform at the ADC input pin and I found that if I put my finger on the voltage regulator the amplitude of the noise shrinks by 1/4.

It looks to me like it is the digital noise leaking over from the digital side of my circuit. I would have never imagined that the digital noise would look like that. Putting the analog and digital pins on seperate regulators would be a lot of effort, but adding an inductor would be quick and easy, therefor I will try the inductor first.

Thanks everyone for the patience, help, and guidance.

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On my O-scope I measure the frequency to be 61 Hz.

I was thinking that if my frequency is so low, a 10 mH inductor probably will have no effect. I think that the inductor will be a waste of time. I think that I will try dual regulators.

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Using the second graph (Recorded Data2.GIF), with 36 waves over 1180 mSec,
the frequency would be about 30 Hz. Further, every other wave appears to be
distinct in the negative excursion amplitude and placement of samples for the
positive peaks. Assuming that sample rate aliasing is not the cause for the
alternate wave differences, it would imply full wave rectification of an input
frequency at 15 Hz.

Stan

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Stan:

Thank you for bringing to my attention the discrepancy between my O-Scope and my excel file. It turns out that the x-axis labels are off by a factor of two. The frequency would then be 60 Hz.

Do you think that it is correct to assume that it is not typical 60 Hz power noise based on the observation that the 60 Hz is perfectly in sync with the processor?

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In the datasheet for the LM317 national claims a "ripple rejection" of 80 dB. Is this the same thing as PSRR?

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If the frequency is 60 Hz, the "noise" is most likely direktly something from the 60 Hz poweline frequency. If touching the regulatator did change things signaificantly, it indicates some capacitive coupling from the outside. So probabaly some parts of the amplifier are too high in imedance and an electrical shield is missing or not connected.

Even with a lot of efford its sometimes not possible to get rid of the 60 Hz entirely. Than it is helpfull to use some digital filtering to suppress the 60Hz and harmonics.

But here its first up to improvements in the analog part. Elektric shielding is still a relative easy part. If you have magnetic coupling things can get more difficult.

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I split the voltage supply into analog and digital with two LM317's. It appears to have no effect on the noise. See image below.

Next I tryed disconnecting the MAX4194 from the mcu and measured the noise on the o-scope and it was still present. I checked all the pins of the max4194 with the o-scope and the signal was only present on the output pin and the ref pin.

I still don't think that its outside noise because the data is perfectly insync with the clock on the mcu. I tried sheilding the whole board with aluminum foil and it had no effect.

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I think I figured it out. I disconnected the wires going to the wheatstone bridge and the niose went away. The wires must have been acting like an antenna. I am going to try to use coaxial cable and see if I get a better result.

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In the past I used individually shielded cables for 4 legs of the bridge & that does cut the 50Hz mains out.
The 4 sensors are enclosed in a small metal enclosure (Faraday cage) without impinging the effect of the performance.

The front end is where all the attention is needed included the mixing of the analog & digital earthing point are being taken care of in the proper manner.

Pending what your frequency response you want out of the bridge, can either as above said apply digital filtering
or insert an analog notch filter for 60Hz after the amp.

Ken

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The signal the circuit seems to pick up looks like 60 Hz, and it problably only looks like it is looked to the µC clock. If at all the µC clock is locked to the powerline frequency. But ist also possible that they are just two quite stable frequencies.

If you can't get rid of the 60 Hz in the analog word there is still the digital filtering, which can be as easy as averiging over an integer number of periods of the 60 Hz signal. An analog notch is usually not very usefull, as this is not only 60Hz but also the harmonics. For making use of oversampling its actually even positive to have a small AC signal superimposed.

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dpaulsen wrote:
I think I figured it out. I disconnected the wires going to the wheatstone bridge and the niose went away. The wires must have been acting like an antenna. I am going to try to use coaxial cable and see if I get a better result.

You can use a driven shield technique, look up how ECG/EKG leads are handled.

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Quote:
driven shield technique
Will this be good enough for low impedance bridge(typical 300 ohms)?
They are fine for the ECG/EKG & also used for Voltage or Current Clamp Hi Z application.

But it's an idea worth trying, which I have never thought about.
Would you drive each legs separately or the lot by one?
Good suggestion, see if 'dpaulsen' apply it & get some feedback.

Ken

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pykedgew wrote:
Quote:
driven shield technique
Good suggestion, see if 'dpaulsen' apply it & get some feedback.

Sorry I didn't even get that far. Before trying the coax I decided to try very short wires. From this I assumed that the unsheilded wire were not the problem.

Next I tried adding a ground wire (to wall ground)to the aluminum that the strain gages are glued to. This provided a noticable improvement, but I observed that the zero point was floating.

Finally I tried connecting the negative leg of the differenial input on the amplifier to the adc ground and all my noise problems vanished. I guess having the differential side of the amplifier completely isolated from the output side was the source of my noise problems.

Thanks to everyone who posted their suggestions.

-Daniel

edit: grammer

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Wow no noise at all.

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Umm.. Sanity check: Is there signal?

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dbvanhorn wrote:
Umm.. Sanity check: Is there signal?
You were right to be suspicious. Because my signal can be positive or negative I needed to connect the input of the differential amplifier to 1/2 of Vcc instead of ground.

When it was connected to ground my input voltage was so small it was operating too close to the rail.

Here is what I get after connecting the bridge to 1/2 Vcc:

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I'm sure you already knew this, but if you have a DSO there is a good chance it has a FFT function, which you can use to figure out the frequency and amplitude of your noise.

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UNiXWHoRe wrote:
I'm sure you already knew this, but if you have a DSO there is a good chance it has a FFT function, which you can use to figure out the frequency and amplitude of your noise.
Out of curiosity how much do those cost?

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Mine cost me 250$. It's a Hantek DSO-2150.

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62.5 hz, not 60.0?

How confident are you on the exact frequency? 62.5 could be a monitor refresh rate, or aliasing down of some higher frequency noise. You should low-pass filter your analog input, to the degree that you can.