XMEGA A1, EBI, ext. RAM and BASEADDR register

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ce
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Location: Bocholt, Germany
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Posted by ce: Wed. Dec 3, 2008 - 10:36 AM
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I have got an ATXmega128A1 and a 32kByte-SRAM connected at EBI (3-Port-Mode).

I configure the system like this:

PORTH_OUT=(1<<PIN0_bp) | (1<<PIN1_bp) | (1<<PIN2_bp) |(1<<PIN4_bp);
PORTH_DIR=0xFF;
PORTK_DIR=0xFF;
    EBI.CTRL=EBI_SDDATAW_8BIT_gc|EBI_LPCMODE_ALE1_gc|EBI_SRMODE_ALE1_gc|EBI_IFMODE_3PORT_gc;
EBI.CS0.CTRLB=(1<<EBI_CS_SRWS2_bp); // 4 wait states
EBI.CS0.BASEADDR=0x0000;
EBI.CS0.CTRLA=EBI_CS_ASPACE_32KB_gc|EBI_CS_MODE_SRAM_gc;

But in this case I can only address 16kByte (0x4000-0x7FFF) instead of 32kByte (0x4000-0xBFFF). The highest address line (A14) is always high (logical '1').

If I use EBI_CS_ASPACE_64KB_gc instead of EBI_CS_ASPACE_32KB_gc then I can write the full 32kByte RAM. But in the first 16kByte A14 is set and in the last 16kByte the A14 is cleared.

I have got the suspicion that I cannot access the lower 16k address space. But why? I played a bit with the EBI.CS0.BASEADDR register. But it does not help. To be honest: I do not really understand the description of this register...

Thanks in advance for any help or comments!

Tags:

AVR Microcontrollers, megaAVR and tinyAVR, ATmega128, ATmega128A
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Bronze Marktheusch
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Joined: Mon. Feb 19, 2001
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Location: Wisconsin USA
Posted by theusch: Wed. Dec 3, 2008 - 02:08 PM
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I cannot answer directly, but are you aware of app note AVR1312? A link, and others, are in this thread:
https://www.avrfreaks.net/index.p...

Also
https://www.avrfreaks.net/index.p...

And perhaps most pertinent?
https://www.avrfreaks.net/index.p...
"Only 4-bit devices are supported in 3-port mode..."

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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ce
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Level: Hangaround
Joined: Fri. Mar 11, 2005
Posts: 117 View posts
Location: Bocholt, Germany
Posted by ce: Thu. Dec 4, 2008 - 08:11 AM
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@Lee: Of course I did the same forum search like you did. And I read those threads and also the AVR1312. These things helped me to get the SRAM up and running.

This means it worked already as I started this thread but something is weird which I do not understand.

1. Why do I have to configure a 64kByte-RAM (EBI_CS_ASPACE_32KB_gc) to be able to fully address my 32kByte-RAM?
2. Why does EBI address the higher part of the RAM first (A14 is set)?
3. What should I write into EBI.CS0.BASEADDR?

Quote:
And perhaps most pertinent?
https://www.avrfreaks.net/index.p... ... xmega+sram
"Only 4-bit devices are supported in 3-port mode..."
4-bit in 3-port-mode is meant for SDRAM only.

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