Hi, I'm trying to implement an interrupt-based watchdog timeout on a mega2560, and I've read the datasheet watchdog section three times and am not sure what I'm doing wrong.
(I'm a relative rookie, so please don't waste any time crafting an answer based on the assumption that I wouldn't have done something obvious and dumb. I have read the datasheet and I am sure I am consistent with it, and when that doesn't work I don't know what else to do but ask you guys the question.)
(Also this might all be 2560 specific -- I don't want you to do any research, just looking for brainstorming ideas from similar efforts on your favorite targets.)
How the watchdog behaves appears to depend on the WDTCSR register and WDTON. In main(), before my infinite loop starts, I've confirmed that I've successfully set
WDTCSR = 0x61 = 0b01100001
= interrupt enabled, system reset disabled
(and others setting the timeout period to a few seconds)
using this code before infinite loop starts (which is cribbed from codewizard)
// Watchdog Timer initialization // Watchdog Timer Prescaler: OSC/1024k // Watchdog Timer interrupt: On #pragma optsize- #asm("wdr") //WDTCSR=0x39; //WDTCSR=0x69; WDTCSR=0x39; WDTCSR=0x61; #ifdef _OPTIMIZE_SIZE_ #pragma optsize+ #endif
and I have an interrupt handler to put the device in a safe state.
but the WDTON fuse has to be 1 for any of this to work. However, as soon as I turn on WDTON, the device seems to seize up, and JTAGing in seems to indicate that it is continually rebooting.
Apparently there is some subtlety to this I'm not getting. Does WDTON interfere with JTAG mode? Even if reset mode is somehow left on (counter to my 0x61 above) shouldn't I get my several seconds rather than an immediate reboot?
Thanks, any thoughts are appreciated.