plz help about pwm generation with atmega8

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i need to design a pwm generation with atmega8..
the frequency and duty cycle of the signal ought to be changeable.
the frequency interval: 500Hz- 5khz
duty cycle:%100-%5
because the fast pwm mode of the timer2 of atmega8 doesn't support my goal i need to write a program
i dont want you to write all the program.
plz give me a hand only about the framework information

thanks

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I'm sort of a beginner and am not familiar with the mega8, but since no one has replied so far, I thought I'd give it a shot.

I used the phase correct method with a mega8535 running on the internal 8 MHz clock. I also used timer2. I don't have it here now to check, but as I recall it is working at about 5 KHz (edit: I checked and it runs about 15.6 KHZ). I'm not sure of your application and I wonder if you are limited to fast PWM mode. Also, is it OK to vary the PWM frequency in large steps? Or must it be continuously variable? In phase correct PWM I can vary the frequency by changing the timer2 clock, but the number of frequencies is limited to just a few.

The data sheet probably has everything you need to know. The duty cycle is controlled by loading a byte into one of the output compare registers.

Unless you need to dither the PWM, it can be done without interrupts.

John, W0GN

Last Edited: Fri. Aug 1, 2008 - 02:51 PM
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thanks but the fast pwm mode doesnt support my goal because the frequency interval i need is more wide. i need a software and in this software i must use more than one timer..pwm mode doesnt let me change frequency but duty cycle by using the output compare register.

thanks

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Sure, timers with PWM let you change frequency. You just change the TOP value!

Jim

 

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For the range that you want you may be able to use timer1, but you haven't said what resolution and accuracy that you need.

Regards,
Steve A.

The Board helps those that help themselves.

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---in fast pwm mode
f=fclk/N/256 (N=prescale factor 1,8,32,64,128,256,1024)
changing the output compare register let me tune the duty cycle but frequency.
---in clear timer on compare match mode
f=fclk/2/N/(1+OCRn)
(N=prescale factor 1,8,32,64,128,256,1024)
OCRn= the value of the compare register.
in this mode i cant tune the duty cycle(D).it is %50.

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i think atmega8 timer2's frequency of PWM cant be 'changed'. the counter count from BOTTOM to MAX (not TOP). CMIIW
why dont use timer1 instead?

kurro

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The easiest and smartest solution would be to use (as suggested above) to use Timer1. If you can't for some reasons switch to any other timer then you might try to upgrade to the pin compatible ATmega88. Timer0 of ATmega88 can be configured to use OCR0A to define the timer top value while OCR0B can be used to set the duty cycle.

Regards
Sebastian

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thanks to everyone